Abstract
This paper presents a processor architecture which supports the execution of functional languages. The implementation of functional languages poses similar needs as conventional languages on computer architectures, but with some additions and slightly different weights. CAST is a general purpose 40-bit RISC1 processor with a Harvard2 architecture. It has a four-stage pipeline for efficient execution of programs. CAST has 128 general purpose registers in addition to four on-chip stacks with 32 elements each. The stacks represent a synthesis of pure stacks and variable sized register windows. Two stacks are easily interchangeable to support a fast subroutine call mechanism and efficient parameter passing. The tagged architecture supports runtime type-checking by means of a validation of operand types simultaneously with the execution of primitive functions. The versatile reduced instruction set with register-to-register, load/store, call and conditional branch instructions offers a powerful basis for an efficient implementation of functional languages. A TTL prototype implementation executes some benchmark programs similar fast as a RISC processor highly optimized C programs, despite a four fold slower cycle time.
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Aßmann, C. (1992). CAST A Processor Architecture for the Efficient Execution of Functional Programs. In: Jammel, A. (eds) Architektur von Rechensystemen. Informatik aktuell. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-77422-5_2
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DOI: https://doi.org/10.1007/978-3-642-77422-5_2
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