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Two-level Pipelining of Systolic Array Graphics Engines

  • J. A. K. S. Jayasinghe
  • O. E. Herrmann
Conference paper
Part of the Eurographic Seminars book series (FOCUS COMPUTER)

Abstract

In a systolic array, the maximum operating speed is determined by the most complex operation performed. In a systolic array graphics engine, capable of generating high quality images, one has to perform complex operations at a very high speed. We propose to use pipelined functional units in systolic array graphics engines as they can perform complex operations at high speeds. Due to time-varying discontinuities of operations performed by systolic array graphics engines, introduction of pipelined functional units is a complex problem. In this paper we present a methodology which solves this problem by a graph-theoretic approach. Furthermore, we characterize the architectures which can be improved by pipelined functional units.

Keywords

Time Slot Critical Path Systolic Array Storage Node Frame Buffer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© EUROGRAPHICS The European Association for Computer Graphics 1991

Authors and Affiliations

  • J. A. K. S. Jayasinghe
    • 1
  • O. E. Herrmann
    • 1
  1. 1.Laboratory for Network TheoryTwente UniversityEnschedeThe Netherlands

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