Abstract
Image generation for raster displays proceeds in two main steps: geometry processing and pixel processing. The subsystem performing the pixel processing is called display processor.
In the paper a model for the display processor is developed that takes into account both function and timing properties. The model identifies scan conversion, hidden surface removal, shading and anti-aliasing as the key functions of the display processor. The timing model is expressed in an inequation being fundamental for all display processor architectures.
On the basis of that model a taxonomy is presented which classifies display processors according to four main criteria: function, partitioning, architecture and performance.
The taxonomy is applied to five real display processors: Pixel-planes, SLAM, PROOF, the Ray-Casting Machine and the Structured Frame Store System.
Investigation of existing display processor architectures on the basis of the developed taxonomy revealed a potential new architecture. This architecture partitions the image generation process in image space and employs a tree topology.
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© 1991 EUROGRAPHICS The European Association for Computer Graphics
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Schneider, BO. (1991). Towards a Taxonomy for Display Processors. In: Grimsdale, R.L., Straßer, W. (eds) Advances in Computer Graphics Hardware IV. Eurographic Seminars. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-76298-7_1
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DOI: https://doi.org/10.1007/978-3-642-76298-7_1
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