A High Transconductance β-SiC Buried-Gate Junction Field Effect Transistor

  • G. Kelner
  • M. Shur
  • S. Binari
  • K. Sleger
  • H. Kong
Conference paper
Part of the Springer Proceedings in Physics book series (SPPHY, volume 43)


An improved performance buried-gate junction field effect transistor (JFET) has been fabricated and evaluated. This structure employs an n-type R-SiC (111) thin film grown on the Si (0001) face of a p-type 6H β-SiC substrate. Electron-beam evaporated Ti/Au was used as an ohmic contact to the n-type β-SiC layer and thermally evaporated A1 was used to contact the n-type gate (substrate). Devices with 4μm gate lengths had a maximum room temperature transconductance of 20mS/mm, which is the highest reported for any β-SiC FET structure. The fabrication and performance of the improved devices will be compared with those of JFETs fabricated in similar β-SiC layers grown on a Si substrate. In addition, the experimental data have been analyzed using a charge control model. This analysis shows that the effective field-effect mobility (565 cm2/V-s) is close to the measured Hall mobility (470 cm2/V-s). Calculated drain current versus drain voltage (ID-VD) characteristics for a buried-gate JFET are in good agreement with the experimental data. Further improvements in device performance are anticipated as gate dimensions approach one micron or less.


Gate Voltage Drain Current Gate Length Drain Voltage Specific Contact Resistance 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    R. C. Marshall, T. W. Faust, Jr. and C. E. Ryan ed: Silicon Carbide-1973 ( University of South Carolina Press, Columbia, 1974 ) p. 673.Google Scholar
  2. 2.
    D. K. Ferry, “High Field Transport in Wide-Bandgap Semiconductors”, Phy. Rev., IB 12 pp. 2361–2369, 1975.ADSGoogle Scholar
  3. 3.
    C. Van Opdorp and J. Vrakking, “Avalanche Breakdown in Epitaxial SiC p-n Junctions”, J. Appl. Phys. 40, pp. 2320–2322, 1969.ADSCrossRefGoogle Scholar
  4. 4.
    H. Matsunami, S. Nishino and H. Ono, “Heteroepitaxial Growth of Cubic Silicon Carbide on Foreign Substrates”, IEEE Transact. Electron Devices 28, pp. 1235–1236, 1981.CrossRefGoogle Scholar
  5. 5.
    G. Kelner, S. Binari, K. Sieger, H. Kong, “β-SiC MESFET’s and Buried-Gate JFET’s”, IEEE Electron Device Letters, Vol. 8, pp. 428–430, 1987.ADSCrossRefGoogle Scholar
  6. 6.
    C. Vergnolie, R. Funck, and M. Laviron, “An adequate structure for power microwave FETs,” in ISSCC Dig. Tech. Papers, 1975, pp. 66–67.Google Scholar
  7. 7.
    H. S. Kong, G. T. Glass, R. S. Davis, “Epitaxial Growth of β-SiC Thin Films on 6H β-SiC Substrates via Chemical Vapor Deposition”, Appl. Phys. Letters, 49, pp. 1074–1076, 1986.ADSCrossRefGoogle Scholar
  8. 8.
    J. W. Palmour, R. F. Davis, P. Astell-Burt, P. Blackborow, “Surface Characteristics of Monocrystalline R-SiC Dry Etched in Florinated Gases”, Science and Technology of Microfabrication, Vol. 77, pp. 185–190, 1987.Google Scholar
  9. 9.
    M. Shur, GaAs Devices and Circuits (Plenum, New York), 1987.Google Scholar

Copyright information

© Springer-Verlag Berlin, Heidelberg 1989

Authors and Affiliations

  • G. Kelner
    • 1
  • M. Shur
    • 2
  • S. Binari
    • 1
  • K. Sleger
    • 1
  • H. Kong
    • 3
  1. 1.Naval Research LaboratoryUSA
  2. 2.Dept. of Electrical EngineeringUniversity of MinnesotaMinneapolisUSA
  3. 3.Dept. of Material Science and EngineeringNCSURaleighUSA

Personalised recommendations