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GI — 18. Jahrestagung II pp 3–29Cite as

SFB 124: VLSI-Entwurfsmethoden und Parallelität

Projektbereich B: Methoden des VLSI-Entwurfs

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Part of the book series: Informatik-Fachberichte ((INFORMATIK,volume 188))

Zusammenfassung

Im Projektbereich B des SFBs 124 gibt es 4 Teilprojekte, die sich auf verschiedene Aspekte des Chipentwurfs konzentrieren.

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Literatur

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Eigene Veröffentlichungen

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Eigene Veröffentlichungen

  1. H. Alt, T. Hagerup, K. Mehlhorn, F.P. Preparata: “Deterministic Simulation of Idealized Parallel Computers on More Realistic Ones”. SIAM Journal on Computing 16, pp. 808–835 (1987).

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Literatur

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Eigene Veröffentlichungen

  1. T. Hagerup, W. Rülling: “A Generalized Topological Sorting Problem”. Proc. of the AWOC, LNCS 227, pp. 261–270 (1986).

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  2. W. Rülling: “Einführung in die Chip-Entwurfssprache HILL”. SFB-Bericht 04/1987.

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  1. E. Clarke, Y. Feng: “Escher, A Geometrie Layout System for Recursively Defined Circuits”. Department of Computer Science, Carnegie Mellon University, 1985.

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Eigene Veröffentlichungen

  1. M. Heitkamp: “Ein Intelligenter Graphik-Editor für Stickdiagramme”. Diplomarbeit, 1987.

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  1. J.D. Williams: “STICKS — A Graphical Compiler for High Level LSI Design”. National Computer Conference, pp. 289–295 (1978).

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  1. W. Rülling: “Constructing Legal Layouts from Stick Diagrams is an NP-Complete Problem”. SFB-Bericht 09/1986.

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  2. W. Rülling: “Konstruktion legaler Layouts im HILL System”, in Vorbereitung.

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  2. P. Eichenberger, M. Horowitz,: “Toroidal Compaction of Symbolic Layout for Regular Structures”. ICCAD 1987, pp. 142–145.

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Eigene Veröffentlichungen

  1. R.K. Ahuja, K. Mehlhorn, J.B. Orlin, R.E. Tarjan: “Faster Algorithms for the Shortest Path Problem (An Extended Abstract)”.

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  2. K. Mehlhorn, St. Näher: “A Faster Compaction Algorithm with Automatic Jog Insertion”. Proc. of the 5th MIT Conf. on Adv. Res. in VLSI (1988).

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  3. K. Mehlhorn, W. Rülling: “Compaction on the Torus”. SFB-Bericht 04/1988.

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  4. W. Rülling: “Spezielle Probleme beim Kompaktieren”. VLSI-Workshop, Gut Ising, Juni 1987.

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  5. P. Spirakis, A. Tsakalidis: “A Very Fast, Practical Algorithm for Finding a Negative Cycle in a Digraph”. Proc. of the 13th ICALP (1986)

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  6. M. Kaufmann, K. Mehlhorn: “A Linear-Time Algorithm for the Local Routing Problem”. SFB—Bericht (1988).

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Authors and Affiliations

  1. Fachbereich Informatik, Universität Hamburg, Rothenbaumchaussee 67/69, 2000, Hamburg 13, Deutschland

    Rüdiger Valk

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  1. Rüdiger Valk
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Editors and Affiliations

  1. Fachbereich Informatik, Universität Hamburg, Rothenbaumchaussee 67/69, 2000, Hamburg 13, Deutschland

    Rüdiger Valk

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© 1988 Springer-Verlag Berlin Heidelberg

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Valk, R. (1988). SFB 124: VLSI-Entwurfsmethoden und Parallelität. In: Valk, R. (eds) GI — 18. Jahrestagung II. Informatik-Fachberichte, vol 188. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-74135-7_1

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  • DOI: https://doi.org/10.1007/978-3-642-74135-7_1

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-50360-6

  • Online ISBN: 978-3-642-74135-7

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