Advertisement

CAD: Overview and Perspectives

  • R. Sénéor
Conference paper
Part of the Springer Proceedings in Physics book series (SPPHY, volume 13)

Abstract

Computer Aided Design (CAD) started at the beginning of the sixties. It appeared at the same time as the introduction of multiprogrammed, time-shared graphic terminals. It was applied to different domains of industrial activity such as for example engineering problems, realisations of electrical networks or of integrated circuits. Even if the subject of my talk is only related to CAD for Very Large Scale Integration (VLSI) the general principles governing it apply as well to other industrial purposes. There are 4 phases:
  1. i/

    Conceptual project. It starts by the definition of a product. This is the result of commercial, scientific or technical demands

     
  2. ii/

    Project analysis

     
  3. iii/

    Detailed definition of all the components

     
  4. iv/

    Project documentation

     

Keywords

Simulated Annealing Very Large Scale Integration Circuit Simulation Mask Level Very Large Scale Integration Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    N. Giambasi, J-C. Rault, J-C. Sabonnadiere: Introduction à la conception assistée par ordinnateur ( Hermes, Paris, 1983 )Google Scholar
  2. [2]
    S. Kirkpatrick, C.D. Gelatt, Jr., M.P. Vecchi: Optimization by simulated annealing. Science, 220, 671 – 680 (1983)CrossRefGoogle Scholar
  3. [3]
    M.P. Vecchi, S. Kirkpatrick: Global wiring by simulated annealing. IEEE Trans. CAD, CAD-2, N°4, 215–222 (1983)Google Scholar
  4. [4]
    C.A. Mead: “Structural and Behavioral Composition of VLSI,” in VLSI Design of Digital Systems, p. 3, ( North Holland, Amsterdam, 1983 )Google Scholar
  5. [5]
    G.R. Rabbat: Hardware and Software Concepts in VLSI, ( Van Nostrand, New-York, 1983 )Google Scholar
  6. [6]
    S. Muroga: VLSI System Design, ( Wiley, New York, 1982 )Google Scholar
  7. [7]
    D.F. Barbe (ed): Very Large Scale Integration VLSI, ( Springer, Berlin, Heidelberg 1980 )Google Scholar
  8. [8]
    H. Sakuma, Y. Fujinami, T. Kurobe: “Nelsim: A Hierarchical VLSI Design Verification System”, in VLSI 83 - VLSI Design of Digital Systems, ed. by F. Anceau, E. J. Aas, p. 109, ( North-Holland, Amsterdam 1983 )Google Scholar
  9. [9]
    L. W. Nagel: “SPICE2: A Computer Program to Simulate Semiconductor Circuits”, Memo ERL-M520, University of California, Berkeley CA (1975)Google Scholar
  10. [10]
    T. W. Williams: “Design for testability” in Computer Design Aids for VLSI Circuits ed. by P. Antognetti, D.O. Pederson, H. De Man, Nato Advances Study Institutes Series (1981)Google Scholar
  11. [11]
    N. Weste and K. Eshraghian: Principles of CMOS VLSI Design, A Systems Perpestive, ( Addison-Wesley, Reading MA 1985 )Google Scholar
  12. [12]
    J. D. Williams: STICKS-A Graphical Compiler for High Level LSI Design, AFIPS Conference (1978)Google Scholar
  13. [13]
    T. Whitney, C. Mead: “Pooh: A Uniform Representation For Circuit Level Designs” in VLSI 83 - VLSI design of digital systems, ed. by F. Anceau, E.J. Aas ( North-Holland, Amsterdam 1983 )Google Scholar
  14. [14]
    Silicon Compilers: Electronic Engng. 57, 9, p. 135 (1985)Google Scholar
  15. [15]
    C.A. Mead, L.A. Conway: Introduction to VLSI Systems ( Addison-Wesley, Reading MA 1980 )Google Scholar
  16. [16]
    K. Ueda, H. Kitazawa and I. Harada: CHAMP: Chip floor plan for hierarchical VLSI layout design. IEEE, CAD-4, NO 1 p. 1985Google Scholar
  17. [17]
    M.A. Beuer and H.W. Carter: “VLSI Routing” in Hardware and Software Concepts in VLSI, ed. by G.R. Rabbat, ( Van Nostrand, New-York, 1983 )Google Scholar
  18. [18]
    S.R. White:Concepts of Scale in Simulated Annealing in Proc. IEEE Int. Conf. on Computer Design, Port Chester, New York, p. 652 (1984)Google Scholar
  19. [19]
    A.L. Sangiovanni-Vincentinelli: “Circuit Simulation” in Computer Design Aids for VLSI Circuits ed. by P. Antognetti, D.O. Pederson, H. De Man, Nato Advances Study Institutes Series (1981)Google Scholar
  20. [20]
    A.R. Newton: “Timing, Logic and Mixed-mode Simulation for Large MOS Integrated Circuits” in Computer Design Aids for VLSI Circuits ed. by P. Antognetti, D.O. Pederson, H. De Man, Nato Advances Study Institutes Series (1981)Google Scholar
  21. [21]
    B.R. Chawla, H.K. Gummel, P. Kozak: “MOTIS - An MOS Timing Simulator” IEEE Trans. Circuits and Systems, 22, 12, p. 901 (1975)CrossRefGoogle Scholar
  22. [22]
    E.K. Cheng: Verifying Compiled Silicon, VLSI Design, October, p. 70 (1984)Google Scholar
  23. [23]
    Lattice Logic Ldt.: “Designing with Gate Arrays”, Edition 3. 2 LLL, Edinburgh (1982)Google Scholar
  24. [24]
    J.M. Siskind, J.R. Southand, K.W. Crouch: “Generating Custom High Performance VLSI Design from Succinct Algorithm Description” in Proceedings of Conference on Avanced Research in VLSI, January, p. 28 (1982)Google Scholar
  25. [25]
    S. Evanczuk: Results of a Silicon Compiler Design Challenge, VLSI Design, July, p. 46 (1985)Google Scholar
  26. [26]
    P. Denyer, D. Renshaw, N. Bergmann: “A Silicon Compiler for VLSI Signal Processors” in Proceedings of the 1982 European Solid State Circuits Conference (1982)Google Scholar
  27. [27]
    Storage/logic Arrays Finally get Practical in Electronics, January, p. 29 (1986)Google Scholar
  28. [28]
    S.A. Solla: Private CommunicationGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1986

Authors and Affiliations

  • R. Sénéor
    • 1
  1. 1.Centre de Physique ThéoriqueEcole PolytechniquePalaiseau CedexFrance

Personalised recommendations