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Literaturverzeichnis
Krauß, G. et al. s Digitalrechner simuliert Schaltungen in der Ingenieurausbildung / Elektronik. Elektronik 22 (1973) 185 – 190.
Nielinger, H.: Netzwerkanalyse im simulierten Labor. NTZ 28 (1975) K364 – K368.
Hoefer, E.E.E.: Benutzeranleitung für SPICE 1. 3. Aufl. Furtwangen 1979.
Renk, K.D.; Steinkopf, U.: Programme zur Analyse elektrischer Schaltungeneine vergleichende Obersicht. NTZ 26 (1973) K37 – K43.
Nagel, L.W.; Pederson, D.O.: SPICE. Berkeley, University of California, Electronic Research Laboratory. ERL - M 382, 1973.
Nagel, L.W.: SPICE2: A Computer program to simulate semiconductor circuits. Berkeley, University of California, Electronic Research Laboratory. ERL - M 520, 1975.
S.8.5
Calahan, D.A.: Rechnergestützter Schaltungsentwurf. München 1973.
Rumsey, D.L.: A saturating transformer model for SPICE. Proc. 15th Intersoc. Energy Conver. Eng. Conf. New York, AIAA, 1980, S. 95 – 99.
Desoer, C.A.; Kuh, E.S.: Basic circuit theory. New York 1969, S. 347.
Kuo, Y.L.: Distortion analysis of bipolar transistor circuits. IEEE Trans. CT-20 (1973) 709 – 717.
Chisholm, S.H.; Nagel, L.W.: Efficient Computer Simulation of distortion in electronic circuits. IEEE Trans. CT-20 (1973) 742 – 745.
Narayanan, S.: Transistor distortion analysis using Volterra series representation. Bell Syst. Techn. J. 46 (1967) Mai-Juni.
Director, S.W.; Rohrer, R.A.: The generalized adjoint network and network sensitivities. IEEE Trans. CT-16 (1969) 318 – 323.
Rohrer, R.A.: Computationally efficient electronic noise calculations. IEEE 3. Solid-State Circ., SC-6 (1971) 204 – 213.
Meyer, R.G. et al.: Computer Simulation of 1f noise Performance of electronic circuits. IEEE J. Solid-State Circ., SC-8 (1973) 273 – 240.
Vladimirescu, A.; Liu, S.: The Simulation of MOS integrated circuits using SPICE 2. Berkeley, University of California, Electronic Research Laboratory. ERL M807, 1980.
Weil, P.: Companion networks for advanced transistor model. Los Angeles, University of California, Computer Science Dept., PhD Dissertation. 1976.
Gummel, H.K.; Poon, H.C.: An integral Charge control model for bipolar transistors. Bell Syst. Techn. J. 49 (1970) 827 – 852.
Ebers, 3.3.; Moll, J.L.: Large signal behavior of junction transistors. Proc. IRE 42 (1954) 1761 – 1772.
Neudeck, G.W.: The pn junction diode. Reading 1983. ISBN 0 201 05321 7. Kap.4.2 .
Neudeck, G.W.: The bipolar junction transistor. Reading 1983. ISBN 0 201 05322 5. Kap. 3.4 .
Shichman, H.; Hodges, D.A.: Modeling and Simulation of Insulated- Gate Field-Effect Transistor switching circuits. IEEE J. SSC. SC-3 (1968) 285 – 289.
Boyle, G.R.: Macromodeling of integrated circuit operational amplifiers. IEEE 3. SSC. SC-9 (1974) 353 – 363.
Nielinger, H.: Ein begleitendes simuliertes Labor zu einer Vorlesung “tronische Grundschaltungen” unter Verwendung von Makro-Modellen für Operationsverstärker. Beiträge zur Hochschuldidaktik der Fachhochschulausbildung. Report 11. Furtwangen, Karlsruhe 1978.
Gear, C.W.: Numerical integration of stiff ordinary equations. Urbana - Champaign, University of Illinois. Report 221 (1967) Jan.
Ralston, A.: A first course in numerical analysis. New York 1965. S. 408 – 411.
Bopp, A.: Grundschaltungen der Analogelektonik. Stuttgart 1979. ISBN 3 408 53521 3. Kap.7.3 .
Steinbuch, K.; Rupprecht, W.: Nachrichtentechnik. Berlin 1967.
Reiß, K.: Integrierte Digitalbausteine. München 1970 ,Kap.8.
Nielinger, H.: Die graphische Behandlung der Überkopplung von Impulsen zwischen zwei parallelen Leitungen. NTZ 25 (1972) 79 – 85.
Tietze, U.; Schenk, Ch.: Halbleiter-Schaltungstechnik.5. Aufl. Berlin 1980. ISBN 3 540 09848 8. Kap.8.
McCreary, J.: Design of Bipolar and MOS-Cicuits. Berlin 1983. ISBN 3 8007 1330 6.
Hörbst, E. et al.: Entwicklung von kundenspezifischen Bausteinen. Elektronik 33 (1984) 65 – 69.
Nielinger, H.; Roubitschek, P.: Moderne Ingenieurausbildung in Mikroelektronik: Entwurf, Simulation und Layout eines CMOS-Operationsverstärkers. GMD-Studie Nr.94, St.Augustin 1984, S. 311 – 329.
Tow, J.: A step-by-step active -filter design. IEEE Spectrum 6 (1969) Dez., S.64–68.
Vahldiek, H.: Aktive RC-Filter. München 1972. ISBN 3 486 39321 9. S. 42.
Moschytz, G.S.: Active filter design handbook. Chichester 1981. ISBN 0 471 27850 5. S.40-41.
Johnson, D.E. et al.: A handbook of active filters. Englewood Cliffs 1980. ISBN 0 13 372409 3. S. 106 – 107.
List of SPICE - related publications kann bezogen werden von EECS Industrial Support Office Dep. of Electr. Engin. and Computer Sciences University of California Berkeley, CA 94720, USA.
SPICE Users Group kann erreicht werden über Mr. Morris Balamut co Hughes Aircraft Company Box 9399 - Bldg / MS C5 / 2016 Long Beach, CA 90810 – 0465, USA.
Balamut, M. (Herausg.): SPICE Rack. The Newsletter of the SPICE Users Group. 3 (1983) Nr. 1.
USPICE wird angeboten von Unit Software & Consulting, Inc. 1969 E. Broadway Road, Suite 1 Tempe, Arizona 85282, USA.
PSPICE wird in der BRD vertrieben von Fa. TH0MATR0NIK H. M. Müller Arnulfstr. 4a 82 Rosenheim.
Pratt, C.A. et al.: Computer - aided circuit design and Simulation. Simulation (USA) 37 (1981) Nr. 5, S. 177 – 178.
Bowers, J.C. s I-G SPICE - A circuit designer’s dream. Powerconvers. Int. (USA) 9 (1983) Nr. 6, S. 36 – 40.
I-G SPICE wird angeboten von AB Associates, Inc. P.O. Box 82 215 Tampa, FL 33 682, USA.
Yuan, Y.-C. et al. s MODULAR-SPICE - A »nodular circuit Simulation program. IEEE Int. Conf. on CAD. Digest of Techn. Papers. New York 1983. ISBN 0 8186 0518 9. S. 250 – 251.
Zuberek, W.M. s SPICE-PAC - A package of subroutines for circuit Simulation and optimization. Proc. 26th Midwest Symp. on Circuits and Systems. North Hollywood 1983, S. 484 – 488.
Sorna, M. et al.: Interactive schematic entry for circuit design and Simulation. Proc. 2nd Annual Workshop Interact. Comp.: CADCAM. Silver Spring (USA) 1983. ISBN 0 8186 0521 9. S. 71 – 74.
Bartel, R.: Analog Simulator interacts with circuit designers. Electronic Dös. 31 (1983) Nr. 19, S. 135 – 140.
Krisam, P.: Circuit development and Simulation. Elektron. Ind. 14 (1983) Nr. 10, S. 28 – 30.
Nye, B. et al. s DELIGHT.SPICE: An optimization - based system for the design of integrated circuits.IEEE 1983 Custom Integr. Circ. Conf. New York 1983. S. 233 – 238.
Rathmann, R.: Gate array design for a stand alone development system. Elektron. Ind. 14 (1983) Nr. 7–8, S. 51 – 53.
Koford, J.S. A development system for logic arrays. MIDCON81 Conf. Ree. El Segundo ( CA, USA ) 1981. S. 531 – 9.
Yamaguchi, K. s Experimentation with integrated process, device and circuit Simulators. Trans. Inst. Electron, and Commun. Eng. Jpn. Part C. J66C (1983) 1124 – 1131.
Schmidt, K.H. et al. s A new method of VLSI conform design for MOS cells. Siemens Forsch.- u. Entw. ber. 12 (1983) Nr. 4, S. 225 – 231.
Strojwas, A.J. s Optimal design of VLSI minicells using a Statistical process Simulator. 1983 IEEE International Symposium on Circuits and Systems. New York 1983. Bd. l, S.202–205.
Sangiovanni - Vincentelli, A.L. et al. s Circuit Simulation. Alphen aan den Rijn 1981. ISBN 90 286 2701 4. S. 19 – 112.
Hachtel, G.D. et al. s A survey of third - generation Simulation techniques. Proc. IEEE 69 (1981) 1264 – 1280.
Destine, J.: Estimation of static parameters of a model of FET: By an optimisation method. Rev. HF (Belgien) 12 (1982) 45 – 54.
Sansen, W.M.C. et al.: Ä simple model of ion - implanted JFETs valid in both the quadratic and the subthreshold regions. IEEE J. Solid - State Circuits. SC-17 (1982) 658 – 666.
Voorthuyzen, B.A. et al.: The consequences of the application of a floating gate on DC - MISFET characteristics. Solid - State Electron. (GB) 27 (1984) 311 – 315.
Yang, P. et al.: An investigation of the Charge conservation problem for MOSFET circuit Simulation. IEEE J. SSC. SC-18 (1983) 128 – 138.
Antognetti, P. CAD model for threshold and subthreshold conduction in MOSFET s. IEEE J. SSC. SC-17 (1982) 454 – 458.
Divekar, D.A. A depletion - mode MOSFET model for circuit Simulation. IEEE Trans. CAD-3 (1984) 80 – 87.
Dokos, D.: An N - well CMOS device model for SPICE Simulation. Proc. 1982 Custom Integr. Circuits Conf. New York 1982, S. 211 – 214.
Oakley, R.E. CASMOS - an accurate MOS model with geometry - dependent parameters. IEE Proc. I (GB) 128 (1981) 239 – 247.
Ping Yang et al.: SPICE modeling for small geometry MOSFET circuits. IEEE Trans. CAD-1 (1982) 169 – 182.
Haskard, M.R.: A simple method, for determining SPICE MOS transistor model static parameters. J. Electr. Electron. Eng. Aust. 3 (1983) 232 – 233.
Ward, D.E. et al.: Optimized extraction of MOS model parameters. IEEE Trans. CAD-1 (1982) 163 – 168.
Hartranft, M.D. et al.: An improved methodology for circuit design device model parameter determination. Proc. 1982 Custom Integr. Circuits Conf. New York 1982, S. 205 – 210.
Cassard, J.M.: The sensitivity of SPICE Simulation to input parameter variations. IEEE 1983 Custom Integrated Circuits Conference. New York 1983, S. 224 – 228.
Elmasry, M.I.: Interconnection delays in MOSFET VLSI. IEEE J. Solid - State Circuits. SC-16 (1981) 585 – 591.
Sung Mo Kang: A design of CMOS polycells for LSI circuits. IEEE Trans. CAS–28 (1981) 838 – 843.
Nagaraj, K. Static RAM cell for ternary logic. Proc. IEEE 72 (1984) 227 – 228.
Älbicki, A. s Simulation of NMOS flip - flops under asynchronous inputs. IEEE 1983 Custom Integrated Circuits Conference New York 1983, S. 239 – 242.
Brown, D.J.: Empirical model for Ga As MESFETs. IEE Proc. I (GB) 130 (1983) S. 29 - 32.
Sussman-Fort, S.E. s A complete Ga As MESFET Computer model for SPICE. IEEE Trans. MTT-32 (1984) 471 – 473.
Lee, S.J. s Modeling of backgating effects on Ga As digital integrated circuits. IEEE J. S. lid - State Circuits. SC-19 (1984) 245 – 250.
Tront, J.G. s A design for multiple-valued logic gates based on MESFETs. IEEE Trans. C-28 (1979) S. 854 – 862.
Vogelsang, C.H. et al. s Yield analysis methods for Ga As ICs. IEEE Ga As Integr. Circuit Symp. Techn. Digest. New York 1983, S. 149 – 152.
Cheng, H. s Power MOSFET characteristics with modified SPICE modeling. Solid - State Electron. (GB). 25 (1982) 1209 – 1212.
Costa Freire, J. et al. s Modeling of epidrain effects in VMOS power transistors for CAD. Europ. Conf. on Electronic Design Automation. London 1981, S. 39 – 43.
Minasian, R.A. s Power MOSFET dynamic large-signal model. IEE Proc. I (GB) 130 (1983) 73 – 79.
Kleiner, C.T. s An improved bipolar junction transistor model for electrical and radiation effects. IEEE Trans. NS-29 (1982) 1569 – 1579.
Slotboom, J.W. s An efficient quasi 3-dimensional bipolar transistor analysis program. Numerical analysis of semiconductor devices. Proc. Dublin 1979. ISBN 0 906783 00 3. S. 280 – 289.
Schindel, U. s An extended Gummel-Poon model for an extreme ränge of temperature. IEEE J. Solid - State Circuits. SC-19 (1984) 251 – 253.
Nielinger, H. s Modellparameter zur Simulation des Schaltverhaltens von Diode und Transistor. Elektronik 25 (1976) Nr. l, S. 71 - 73.
Akcasu, O.E. et al. s Overview of device characterization Software for VLSI bipolar devices. Intern. Electron Devices Meeting. Techn. Digest. New York 1982, S. 692 – 695.
Teixeira, P.L.B. s Modeling of bipolar power transistors for CAD. Europ. Conf. on Electronic Design Autom. London 1981, S. 29 – 33.
Antognetti, P. et al. s Optimum design of a power transistor inverter controlled by PWM technique. Proc. Ist Annual Intern. Motorcon ’81 Conf. Oxnard ( CA, USA ) 1981, S. 180 – 188.
Äntognetti, P. : Modeling arid Simulation of power transistors in electronic power Converters. 4th Europ. Conf. on Electrotechn. - Eurocon ’80. Amsterdam 1980. ISBN 0 444 85481 9. S. 367 – 369.
Goodenough, F.: Bipolar power transistors take their cue from MOS technology. Electron. Des. 32 (1984) Nr. 2, S. 37 – 38.
Massobrio, G.: Modeling of a power transistor using CAD. Pixel.Comp. Graphics, CADCAM, Image Process. (It.) 4 (1983) Nr. 2, S. 23 – 28.
Schwaderer, B.: Modellierung bipolarer Mikrowellentransistoren mit dem Netzwerk - Analyseprogramm SPICE. AEÜ 35 (1981) S. 368 – 372.
Azizi, A.: Simulation of microwave bipolar transistors in class C. Proc. 1981 Europ. Conf. Circuit Theory and Des. Delft. S. 581 – 586.
Friedman, N. et al.: Computer analysis and modeling of injection - coupled synchronous logic (ICSL) gates. IEEE J. Solid - State Circ. SC-15 (1980) 340 – 345.
Evans, S.A.: High Performance I2L process and device modeling. 1977 Electrochem. Soc. Spring Meet., Princeton 1977, S. 594.
De Man, H. et al.: On the Simulation of switched capacitor filters and Converters using the DIANA program. 5th Europ. Solid State Circ. Conf. - ESSIRC 79. London 1979, S. 136 – 138.
Knob, A. et al.: Analysis of switched - capacitor networks in the frequency domain using continuous-time two-port eqivalents. IEEE Trans. CAS-28 (1981) 947 – 953.
Gillingham, P.: Frequency domain analysis of switched - capacitor networks using analog two-port equivalents. Mitt. AGEN (Schweiz) 1981, Nr. 32, S. 17 – 24.
Fischer, J.H.: Noise sources and calculation techniques for switched capacitor filters. IEEE J. Solid-State Circ.. SC-17 (1982) 742 – 752.
Nelin, B.D.: Analysis of switched - capacity networks using generalpurpose circuit Simulation programs. IEEE Trans. CAS-30 (1983) 43 – 48.
Sheu, B.J. et al.: Modeling the switch-induced error voltage on a switched - capacitor. IEEE Trans. CAS-30 (1983) 911 – 913.
Toker, J.R. et al.: Fabrication and characterization of E-beam defined MOSFET s with sub-micrometer gate lengths. Intern. Electron Devices Meeting 1980. Techn. Digest. New York 1980, S. 768 – 771.
Tront, J.G. Computer - aided analysis of RFI effects in operational amplifiers. IEEE Trans. EMC-21 (1979) 297 – 306.
Antoniazzi, P. s Dynamic distortion - transient intermodulation distortion (TIM) in monolithic audio amplifiers. Elettron. Oggi (It.) (1980) Nr. 10, S. 169 – 180.
Gamand, P. et al. s Large - signal capabilities and analysis of distributed amplifiers. Electron. Lett. 20 (1984) 317 – 319.
Kerns, D.V., Jr. s An integrated circuit current source with a low temperature coefficient. Int. J. Electron. (GB) 46 (1979) 445 - 448.
Lin, H.C. s Frequency scaling for Computer - aided Fourieranalysis of mixer diode operation. 1980 IEEE MTT-S Intern. Microw. Symp. Digest. New York 1980, S. 398 – 400.
Antognetti, P. et al. s Computer aided analysis of power electroniccircuits containing thyristors. 1979 Intern. Conf. CAD and Manuf. ofElectron. Compon., Circ. and Syst.. London 1979, S. 141 – 144.
Losic, N.A. s A thyristor model for Computer - aided power electronics circuit design. IEEE 1982 IEC0N Proc.. New York 1982, S. 39 – 44.
Bello, V. s Computer program adds SPICE to switching - regulator analysis. Electron. Des. 29 (1981) Nr. 5, S. 89 – 95.
Chetty, P.R.K. s Current injected equivalent circuit approach to modeling of switching DC-DC Converters in discontinuous inductorconduction mode. IEEE Trans. IE-29 (1982) 230 – 234.
Bolognani, S. s Simulation of AC machines by SPICE program. Intern. Conf. Electr. Mach.. Bd.3, Athen 1980, S. 1858 – 1865.
Bolognani, S. s Modelling and SifP. et mulation of induction motors by means of a general 3-phase time-invariant equivalent circuit. lOth IMACS World Congr. on Syst. S. mul. and Scient. Computatioru Bd.3, New Brunswick 1982, S. 21 – 23.
Watkins, J.L. s The effect of solar cell parameter Variation on array power Output. 13th IEEE Photovolt. Spec. Conf. 1978. New York 1978, S. 1061 – 1066.
Jacquemin, J.L. et al. s Simulation of the behaviour of a set of Cu2S-CdS unit photocells. Sol. Cells. ISSN 0379 6787. 5 (1982) 269 – 274.
Frodsham, D.G. et al. s CAD of infrared detector preamplifiers having switched feedback resistors. Proc. SPIE Int. Soc. Opt. Eng. (USA). 327 (1982) 186 – 189.
Kolasinski, W.A. s Single event upset vulnerability of selected 4k and 16k CMOS static RAMs. IEEE Trans. NS-29 (1982) 2044 – 2048.
Blice, R.D. Analysis of the behaviour of integrated Schottky logic in neutron, total dose and dose rate enviroments. IEEE Trans. NS-28 (1981) 4366 – 4375.
McPartland, R.J.: Circuit simulations of alpha-particle - induced soft errors in MOS dynamic RAMs.
Alvarez, A.R.: SPICE Simulation of electronic ignition module. Proc. Southeastcon ’78 Reg.3 Conf.. New York 1978, S. 450 – 453.
Hutchins, H.S.: Design and analysis of poloidal field power systems for the next TOKAMAK. Proc. 8th Symp. Eng. Probl. Fusion Res.. Pt.III. New York 1980, S. 1247 – 1251.
Lieurance, D.W. Proposed EBT-P quench detection technique in a magnetically noisy emironment. Nucl. Technol.Fusion (USA) 4 (1983) Nr.2, Teil 2–3, S. 1392 – 1397.
Haskard, M.R.: A short communication - determination of chip and substrate temperatures. Electrocompon. Sei. and Technol. (GB) 11 (1983) 35 – 41.
Zimmer, C.R.: Computer Simulation of hybrid integrated circuits including combined electrical and thermal effects. Int 3. Hybrid Microelectr. (USA) 5 (1982) 27 – 29.
Mickulecky, D.C.: The use of a circuit Simulation program (SPICE 2) to model the microcirculation. in: Schneck, D.J. (Herausg.): Biofluid mechanics. Bd.2. New York 1980, S. 327 – 345.
Antognetti,P. Computer aided evaluation of electronic circuits reliability. Int. Conf. on CAD and Manuf. of Electron. Compon.,Circ. and Syst..London 1979, S. 97 – 99.
Inohira, S. A Statistical modeling for circuit Simulation in LSI circuit. Trans. Inst. Electron, and Commun. Eng. Jpn. Teil C. 366C (1983) 1108 – 1115.
McCabe, S.: Automatic verification of custom IC layouts. Southcon’83. Electr. Show and Convent.. El Segundo 1983, S. 2211 – 4.
Chua, L.O. Nonlinear optimization with constraints: A cookbook approach. Int. 3. Circuit Theory and Appl. (GB). 11 (1983) 141 – 159.
AI - Hussein, H.K. et al.: Path delay computation for integrated systems. IEEE Intern. Conf. on Circ. and Comput..New York 1982, S. 426 – 430.
Burns, J.L. et al.: Computer-aided prediction of high-frequency Performance limits in Silicon bipolar ICs. IEEE Circuits and Syst. Mag..(USA). 4 (1982) 19 – 22.
Lin, H.C. et al.: Modeling a depletion mode MOSFET. Proc. 1979 Intern. Symp. on Circ. and Syst.. New York 1979, S. 778 – 781.
Oberst, E.F.: Analysis of 3-phase power-supply systems using CAD programs. Proc. 7th Symp. on Eng. Probl. of Fusion Res.. New York 1977, S. 494 – 499.
Hunt, C.E.: A system for automated testing of MOS process, circuit Simulation, and Performance parameters. IEEE Intern. Conf. on CAD. ICCAD-83. Digest of Techn. Papers. New York 1983. ISBN 0 8186 0518 9. S. 207 – 208.
Cassard, J.M.: A sensitivity analysis of SPICE parameters using an 11-stage ring oscillator. IEEE J. Solid-State Circuits. SC-19 (1984) 130 – 135.
Guggenbühl, W. et al.: Simulation of avalanche breakdown in bipolar transistors using SPICE. Bull. Assoc. Suisse Electr.. 74 (1983) S. 224 – 229.
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Hoefer, E.E.E., Nielinger, H. (1985). Literaturverzeichnis. In: SPICE. Informationstechnik und Datenverarbeitung. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-70270-9_9
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