Testing, Testability, Tester, and Testboard

  • Ulrich Golze


The highlight (or bottom) of our design is without doubt the production of prototypes and their successful (or failed) test. As we intend to check our chip with test programs that are as good as possible, we introduce in Section 9.1 the notion of fault coverage as a criterion. Not only at the silicon producer, but also in our lab, the circuit is analyzed in a tester (automated test equipment, ATE, Section 9.2). A successful test depends not only on good test programs but also on well testable circuits. In Section 9.3, we explain design for testability as a set of structures like scanpath, an intelligent “checksum” called signature analysis, test circuits for memories and pad drivers, as well as test units for process parameters permitting estimations of circuit speed.


Test Pattern Test Vector Fault Coverage Test Channel Automate Test Equipment 
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Copyright information

© Springer-Verlag Berlin Heidelberg 1996

Authors and Affiliations

  • Ulrich Golze
    • 1
  1. 1.Department of Integrated Circuit Design (E.I.S.)Technical University of BraunschweigBraunschweigGermany

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