Abstract
Algorithms for parallel execution of Gaussian elimination to solve linear equations arising from VLSI circuit simulation are discussed. Here, elimination trees are used since they embody the dependence of data during the elimination process. They are important means for estimating and controlling parallel solution algorithms. The potential parallelism is increased by reducing the critical path length of the tree. Experimental results rest upon multithreaded methods and compare favourable with theoretical estimates of the speed-up.
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© 2001 Springer-Verlag Berlin Heidelberg
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Dirks, H.K., Fischer, M., Rüdiger, J. (2001). Parallel Algorithms for Solving Linear Equations in VLSI Circuit Simulation. In: van Rienen, U., Günther, M., Hecht, D. (eds) Scientific Computing in Electrical Engineering. Lecture Notes in Computational Science and Engineering, vol 18. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-56470-3_31
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DOI: https://doi.org/10.1007/978-3-642-56470-3_31
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-42173-3
Online ISBN: 978-3-642-56470-3
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