Application of Hypergraphs to SMCs Selection

  • Łukasz Stefanowicz
  • Marian Adamski
  • Remigiusz Wiśniewski
  • Jakub Lipiński
Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 423)


The paper deals with selection of State Machine Components (SMCs) based on Hypergraphs theory. The entire selection process use Petri nets as benchmarks. As it is known, Petri nets are used for modeling of concurrency processes. The SMCs selection problem is classified as NP-Hard which means there does not exist polynomial algorithm which provides an exact solution. In the article we show three SMCs selection methods, advantages and disadvantages of each, results of comparison between traditional methods (exponential backtracking, polynomial greedy) and an exact transversal method based on hypergraphs theory, their efficiency and propriety. An exact transversal method allows to obtain exact solution in polynomial time if selection hypergraph belongs to xt-hypergraph class.


Petri net State Machine Component (SMC) hypergraph exact transversal concurrency hypergraph sequential hypergraph backtracking greedy algorithm of exact transversals 


  1. 1.
    Murata, T.: Petri nets: properties, analysis and applications. Proceedings of the IEEE 77, 541–580 (1989)CrossRefGoogle Scholar
  2. 2.
    Karatkevich, A.: Dynamic analysis of Petri net-based discrete systems. Springer (2007)Google Scholar
  3. 3.
    Bukowiec, A., Mróz, P.: An FPGA synthesis of the distributed control systems designed with Petri nets. In: Proc. IEEE 3rd Int. Conf. on Networked Embedded Systems for Every Application, Liverpool, UK (2012) [6]Google Scholar
  4. 4.
    Karatkevich, A., Wiśniewski, R.: Computation of Petri nets covering by SM-components based on the graph theory. Electrical Review, 141–144 (August 2012)Google Scholar
  5. 5.
    Rudell, R.L.: Logic Synthesis for VLSI Design. PhD thesis, University of California (1989)Google Scholar
  6. 6.
    Wiśniewski, R., Wiśniewska, M., Adamski, M.: A polynomial algorithm to compute the concurrency hypergraph in Petri nets. Measurement Automation and Monitoring 58(7), 650–652 (2012) (in Polish)Google Scholar
  7. 7.
    Wiśniewska, M.: Application of Hypergraphs in Decomposition of Discrete Systems. LNCCS, vol. 23. University of Zielona Góra Press, Zielona Góra (2012)Google Scholar
  8. 8.
    Stefanowicz, Ł., Adamski, M., Wisniewski, R.: Application of an exact transversal hypergraph in selection of SM-components. In: Camarinha-Matos, L.M., Tomic, S., Graça, P. (eds.) DoCEIS 2013. IFIP AICT, vol. 394, pp. 250–257. Springer, Heidelberg (2013)CrossRefGoogle Scholar
  9. 9.
    Knuth, D.: Dancing links. Millennial Perspectives in Computer Science (2000)Google Scholar
  10. 10.
    Eiter, T.: Exact transversal hypergraphs and application to boolean u-functions. Journal of Symbolic Computation 17(3), 215–225 (1994)CrossRefzbMATHMathSciNetGoogle Scholar
  11. 11.
    Desel, J., Juhás, G., Lorenz, R.: Concurrency Relations and the Safety Problem for Petri Nets. In: Jensen, K. (ed.) ICATPN 1992. LNCS, vol. 616, pp. 299–309. Springer, Heidelberg (1992)CrossRefGoogle Scholar
  12. 12.
    Berge, C.: Hypergraphs: Combinatorics of Finite Sets. North-Holland (1989)Google Scholar
  13. 13.
    Bukowiec, A., Doligalski, M.: Petri net dynamic partial reconfiguration in FPGA. In: Moreno-Díaz, R., Pichler, F., Quesada-Arencibia, A. (eds.) EUROCAST. LNCS, vol. 8111, pp. 436–443. Springer, Heidelberg (2013)CrossRefGoogle Scholar
  14. 14.
    Karatkevich, A.: SM-Components problem reductions of Petri nets. Telecommunication Review (2008) (in Polish)Google Scholar
  15. 15.
    Barkalov, A., Titarenko, L., Bieganowski, J., Miroshkin, A.: Synthesis of Compositional Microprogram Control Unit with Dedicated Area of Inputs. In: Lecture Notes in Electrical Engineering vol. 79, pp. 193–214 (2011)Google Scholar
  16. 16.
    Barkalov, A., Kołopieńczyk, M., Titarenko, L.: Design of CMCU with EOLC and encoding of collections of microoperations.  (79), 262–265 (2007)Google Scholar
  17. 17.
    Blanchard, M.: Comprendre, maitriser et appliquer le Grafcet. Automatisation Production (1979)Google Scholar
  18. 18.
    DeMicheli, G.: Synthesis and Optimization of Digital Circuits. PhD thesis, McGraw-Hill Higher Education (1994)Google Scholar
  19. 19.
    Bukowiec, A., Barkalov, A.: Automata Implementation in FPGA devices with Multiple Encoding States. Electrical Review, 185–188 (2009)Google Scholar

Copyright information

© IFIP International Federation for Information Processing 2014

Authors and Affiliations

  • Łukasz Stefanowicz
    • 1
  • Marian Adamski
    • 1
  • Remigiusz Wiśniewski
    • 1
  • Jakub Lipiński
    • 1
  1. 1.Institute of Computer Engineering and ElectronicsUniversity of Zielona GóraZielona GóraPoland

Personalised recommendations