SVITE: A Spike-Based VITE Neuro-Inspired Robot Controller

  • Fernando Perez-Peña
  • Arturo Morgado-Estevez
  • Alejandro Linares-Barranco
  • Manuel Jesus Dominguez-Morales
  • Angel Jimenez-Fernandez
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8226)


This paper presents an implementation of a neuro-inspired algorithm called VITE (Vector Integration To End Point) in FPGA in the spikes domain. VITE aims to generate a non-planned trajectory for reaching tasks in robots. The algorithm has been adapted to work completely in the spike domain under Simulink simulations. The FPGA implementation consists in 4 VITE in parallel for controlling a 4-degree-of-freedom stereo-vision robot. This work represents the main layer of a complex spike-based architecture for robot neuro-inspired reaching tasks in FPGAs. It has been implemented in two Xilinx FPGA families: Virtex-5 and Spartan-6. Resources consumption comparative between both devices is presented. Results obtained for Spartan device could allow controlling complex robotic structures with up to 96 degrees of freedom per FPGA, providing, in parallel, high speed connectivity with other neuromorphic systems sending movement references. An exponential and gamma distribution test over the inter spike interval has been performed to proof the approach to the neural code proposed.


Spike systems Motor control VITE Address Event Representation Neuro-inspired Poisson Neuromorphic engineering Anthropomorphic robots 


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  1. 1.
    Lichtsteiner, P., Posch, C., Delbruck, T.: A 128 × 128 120 dB 15 μs latency asynchronous temporal contrast vision sensor. IEEE J. Solid-State Circuits 43, 566–576 (2008)CrossRefGoogle Scholar
  2. 2.
    Hafliger, P.: Adaptive WTA with an analog VLSI neuromorphic learning chip. IEEE Trans. Neural Netw. 18, 551–572 (2007)CrossRefGoogle Scholar
  3. 3.
    Linares-Barranco, A., Paz-Vicente, et al.: AER neuro-inspired interface to anthropomorphic robotic hand. In: Proceedings of IJCNN, Vancouver, pp. 1497–1504 (2006)Google Scholar
  4. 4.
    Linares-Barranco, A., Gomez-Rodriguez, F., Jimenez-Fernandez, A., Delbruck, T., Lichtensteiner, P.: Using FPGA for visuo-motor control with a silicon retina and a humanoid robot. In: Proceedings of ISCAS 2007, pp. 1192–1195. IEEE Press, New Orleans (2007)Google Scholar
  5. 5.
    Pearson, M.J., Pipe, A.G., Mitchinson, B., Gurney, K., et al.: Implementing Spiking Neural Networks for Real-Time Signal-Processing and Control Applications: A Model-Validated FPGA Approach. IEEE Trans. Neural Networks 18, 1472–1487 (2007)CrossRefGoogle Scholar
  6. 6.
    Xiuqing, W., Zeng-Guang, H., Anmin, Z., Min, T., Long, C.: A behavior controller based on spiking neural networks for mobile robots. Neurocomputing 71, 655–666 (2008)CrossRefGoogle Scholar
  7. 7.
    Rieke, F., Warland, D., Steveninck, R., Bialek, W.: Spikes Exploring the neural code. MIT Press, Cambridge (1999)Google Scholar
  8. 8.
    Dayan, P., Abbot, L.: Theoretical Neuroscience. MIT Press, Cambridge (2001)zbMATHGoogle Scholar
  9. 9.
    Linares-Barranco, A., Jimenez-Moreno, G., Linares-Barranco, B., Civit-Ballcels, A.: On algorithmic rate-coded AER generation. IEEE Transactions on Neural Networks 17(3), 771–788 (2006)CrossRefGoogle Scholar
  10. 10.
    Sivilotti, M.: Wiring Considerations in Analog VLSI Systems with Application to Field- Programmable Networks, Ph.D. Thesis, California Institute of Technology, Pasadena CA (1991)Google Scholar
  11. 11.
    Bullock, D., Grossberg, S.: The VITE model: A neural command circuit for generating arm and articulator trajectories. In: Kelso, J.A.S., Mandell, A.J., Shlesinger, M.F. (eds.) Dynamic Patterns in Complex Systems, pp. 305–326. World Scientific Publishers, Singapore (1988)Google Scholar
  12. 12.
    Jimenez-Fernandez, A., Jimenez-Moreno, G., et al.: A Neuro-Inspired Spike-Based PID Motor Controller for Multi-Motor Robots with Low Cost FPGAs. Sensors 12(4), 3831–3856 (2012)CrossRefGoogle Scholar
  13. 13.
    Perez-Peña, F., Morgado-Estevez, A., Linares-Barranco, A., et al.: Towards AER VITE: building spike gate signal. In: 19th ICECS, Seville, pp. 881–884 (2012)Google Scholar
  14. 14.
    Berner, R., Delbruck, T., Civit-Balcells, A., et al.: A 5 Meps $100 USB2.0 Address-Event Monitor-Sequencer Interface. In: ISCAS, New Orleans, LA, pp. 2451–2454 (2007)Google Scholar
  15. 15.
    Linares-Barranco, A., Osterb, M., Cascado, D., Jiménez, G., et al.: Inter-spike-intervals analysis of AER Poisson-like generator hardware. Neurocomputing 70, 2692–2700 (2007)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Fernando Perez-Peña
    • 1
  • Arturo Morgado-Estevez
    • 1
  • Alejandro Linares-Barranco
    • 2
  • Manuel Jesus Dominguez-Morales
    • 2
  • Angel Jimenez-Fernandez
    • 2
  1. 1.Applied Robotics Research LabUniversity of CadizSpain
  2. 2.Robotic and Technology of Computers LabUniversity of SevilleSpain

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