Abstract
The paper presents the CMOS ASIC design of a digital fuzzy processor, that can compute on arbitrary membership functions. The architecture exploits pipelining and parallelism to reduce the inferencing delay. The processor has been designed to operate at a frequency of 2 GHz using a power supply of 1 V. For a system with 256 active rules, the circuit has delay of 1285 ns and power dissipation of 70.5 mW. The set of common antecedents for a group of rules are stored separately, leading to reduction in delay and power dissipation. The performance of the proposed circuit has been compared with state of the art RISC and CISC processor architectures, and found to dissipate much less power and has much less delay.
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References
Togai, M., Watanabe, H.: Expert System on a Chip: An Engine for Real-Time Approximate Reasoning. IEEE Expert Systems Magazine 1(3), 55–62 (1986)
Lim, M.H., Takefuji, Y.: Implementing fuzzy rule-based systems on silicon chips. IEEE Expert Systems Magazine 5(1), 31–45 (1990)
Zadeh, L.A.: Outline of a New Approach to the Analysis of Complex Systems and Decision Processes. IEEE Transactions on Systems, Man and Cybernetics 3(1), 28–44 (1973)
Zadeh, L.A.: Fuzzy logic, neural networks and soft computing. ACM Transactions on Computing 37(3), 77–84 (1994)
Surmann, H., Ungering, A.P.: Fuzzy rule-based systems on general purpose processors. IEEE Micro 15(4), 40–48 (1995)
Watanabe, H., Detloff, W.D., Symon, J.R., Yount, K.E.: VLSI fuzzy chip and inference accelerator board systems. In: Fuzzy Logic for Management of Uncertainty, pp. 211–243. Wiley, New York (1992)
Nakamura, K., Sakashita, N., Nitta, Y., Shimomura, K., Tokuda, T.: Fuzzy inference and fuzzy inference processor. IEEE Micro 13(5), 37–48 (1993)
Manzoul, M.A., Tayal, S.: Systolic VLSI array for multi-variable fuzzy control systems. International Journal of Systems and Cybernetics 21(1), 27–42 (1990)
Jaramillo-Botero, A., Miyake, Y.: A high speed parallel architecture for fuzzy infer-ence and fuzzy control of multiple processes. In: Proceedings of IEEE 1994 World Congress on Computational Intelligence, vol. 3, pp. 1765–1770 (1994)
Orsila, H., Kangas, T., Salminen, E., Hamalainen, T.D., Hannikainen, M.: Automated memory-aware application distribution for Multi-processor System-on-Chips. Journal of Systems Architecture 53(11), 795–815 (2007)
Samoladas, V., Petrou, L.: Special-purpose architectures for fuzzy logic controllers. Microprocessing and Microprogramming 40(4), 275–289 (1994)
de Salvador, L., Gutierrez, J.: A multilevel systolic approach for fuzzy inference hardware. IEEE Micro 15(5), 61–71 (1995)
Raychev, R., Mtibaa, A., Abid, M.: VHDL Modeling of a Fuzzy Co-Processor Architecture. In: Proceedings of International Conference on Computer Systems and Technologies, pp. I. 2.1–I. 2.6 (2005)
Aranguren, G., Barron, M., Arroyabe, J.L., Garcia-Carreira, G.: A pipe-line fuzzy controller in FPGA. In: Proceedings of IEEE Conference on Fuzzy Systems, vol. 2, pp. 635–640 (1997)
Roy Chowdhury, S., Saha, H.: A High-Performance FPGA-Based Fuzzy Processor Architecture for Medical Diagnosis. IEEE Micro 28(5), 38–52 (2008)
Yager, R.R., Filev, D.P.: SLIDE: A simple adaptive defuzzification method. IEEE Transcations on Fuzzy System 1(1) (1993)
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Guha, A., Roy Chowdhury, S. (2013). CMOS ASIC Design of a High Performance Digital Fuzzy Processor That Can Compute on Arbitrary Membership Functions. In: Gaur, M.S., Zwolinski, M., Laxmi, V., Boolchandani, D., Sing, V., Sing, A.D. (eds) VLSI Design and Test. Communications in Computer and Information Science, vol 382. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-42024-5_28
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DOI: https://doi.org/10.1007/978-3-642-42024-5_28
Publisher Name: Springer, Berlin, Heidelberg
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