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A Power-Aware Scheduler Exploiting All Slacks under EDF Scheduling

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Advances in Computer Science and its Applications

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 279))

Abstract

Power-aware scheduling reduces CPU energy consumption in hard real-time systems through dynamic voltage scaling(DVS). The basic idea of power-aware scheduling is to find slacks available to tasks and reduce CPU’s frequency or lower its voltage using the found slacks. In this paper, we introduce a novel power-aware scheduling algorithm which exploits all slacks under preemptive early-deadline first scheduling. The simulation results show that proposed algorithm with the algorithmic complexity of O(n) reduces the energy consumption by 10-70% over the existing algorithms.

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Correspondence to Ye-In Seol .

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Seol, YI., Kim, JU., Kim, YK. (2014). A Power-Aware Scheduler Exploiting All Slacks under EDF Scheduling. In: Jeong, H., S. Obaidat, M., Yen, N., Park, J. (eds) Advances in Computer Science and its Applications. Lecture Notes in Electrical Engineering, vol 279. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-41674-3_8

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  • DOI: https://doi.org/10.1007/978-3-642-41674-3_8

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-41673-6

  • Online ISBN: 978-3-642-41674-3

  • eBook Packages: EngineeringEngineering (R0)

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