Abstract
Because of the widespread use of 3D graphics processing units, this paper presents the design and implementation of a heterogeneous multi-core graphics processing unit, the HMGPU-9. HMGPU-9 supports OpenGL2.0 and DirectDraw with programmable vertex shaders and fragment shaders. It integrates 9 heterogeneous processor cores and many sophisticated application-specific accelerators into a XC6VLX550T FPGA. It employs dual-rail handshake protocol in its rendering pipeline to achieve high performance. It is capable of assigning graphics processing tasks to different processors for efficiency and flexibility. The pixel filling rate can reach 289.92Mpixel/s at its peak performance.
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Deng, J. et al. (2013). The Design and Prototype Implementation of a Pipelined Heterogeneous Multi-core GPU. In: Zhang, Y., Li, K., Xiao, Z. (eds) High Performance Computing. HPC 2012. Communications in Computer and Information Science, vol 207. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-41591-3_6
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DOI: https://doi.org/10.1007/978-3-642-41591-3_6
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