Skip to main content

Signature Embedding in the Functional Description of Reversible Circuit

  • Conference paper
Book cover Security in Computing and Communications (SSCC 2013)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 377))

Included in the following conference series:

  • 1229 Accesses

Abstract

In order to prevent unauthorized access and illegal redistribution during the exchange and distribution of Intellectual Properties (IPs), embedding ownership information has become inevitable. Recently, research on reversible circuits has drawn significant attention especially in the areas of digital signal processing, nano and quantum computing. The strategies employed for dealing with the security risks associated with the development and distribution of conventional digital circuits may not be directly applicable to reversible circuits. In this paper, we propose a simple technique to embed the owner’s signature during the synthesis of a reversible circuit. The embedded signature can be used to prevent unauthorized access and/or illegal distribution of such circuits (or circuit descriptions). The proposed technique offers strong security as the signature is embedded as a functional part of the design, at the initial stage of the specification. Experimental results on benchmarks show that the owner’s signature can be embedded without significant overhead.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Barenco, A., et al.: Elementary gates for quantum computation. The American Physical Society 52, 3457–3467 (1995)

    Google Scholar 

  2. Bennett, C.H.: Logical reversibility of computation. IBM J. Research and Development 17, 525–532 (1973)

    Article  MATH  Google Scholar 

  3. Cui, A., Chnag, C.H., Tahar, S., Abdel-Hamid, A.T.: A robust FSM watermarking scheme for IP protection of sequential circuit design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 30(5), 678–690 (2011)

    Article  Google Scholar 

  4. Kahng, A.B., et al.: Watermarking techniques for intellectual property protection. In: ACM/IEEE Design Automation Conference, pp. 776–781 (1998)

    Google Scholar 

  5. Keating, M., Bricaud, P.: Reuse Methodology Manual for System-on-a-Chip Designs, 3rd edn. Kluwer, Norwell (2002)

    Google Scholar 

  6. Maslov, D.: Ph.D. Thesis on Reversible Logic Synthesis. The University of New Brunswick (2003)

    Google Scholar 

  7. Offermann, S., Wille, R., Drechsler, R.: Efficient realization of control logic in reversible circuits. In: Forum on Specification and Design Languages (FDL), Oldenburg, pp. 1–7 (2011)

    Google Scholar 

  8. Saeedi, M., Markov, I.L.: Synthesis and optimization of reversible circuits a survey. ACM Computing Surveys (CSUR) 45(52), 1–34 (2013)

    Article  Google Scholar 

  9. Saha, D., Sur-Kolay, S.: Robust intellectual property protection of VLSI physical design. IET Computer & Digital Technique 4(5), 388–399 (2010)

    Article  Google Scholar 

  10. Saha, D., Sur-Kolay, S.: Secure public verification of IP marks in FPGA design through a zero-knowledge protocol. IEEE Transaction on Very Large Scale Integration (VLSI) System PP(99), 1–9 (2011)

    Google Scholar 

  11. Shende, V.V., Prasad, A.K., Markov, I.L., Hayes, J.P.: Synthesis of reversible logic circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22(6), 710–722 (2003)

    Article  Google Scholar 

  12. Soeken, M., Frehse, S., Wille, R., Drechsler, R.: RevKit: An open source toolkit for the design of reversible circuits. In: De Vos, A., Wille, R. (eds.) RC 2011. LNCS, vol. 7165, pp. 64–76. Springer, Heidelberg (2012), RevKit is available at http://www.revkit.org

    Chapter  Google Scholar 

  13. Stallings, W.: Cryptography and Network Security, 5th edn. Prentice Hall (2011)

    Google Scholar 

  14. Sur-Kolay, S., Bhunia, S.: Intellectual property protection and security in system-on-chip design (tutorial). In: International Conference on VLSI Design (VLSID), pp. 18–19 (2012)

    Google Scholar 

  15. Wille, R., Große, D., Teuber, L., Dueck, G.W., Drechsler, R.: RevLib: An online resource for reversible functions and reversible circuits. In: Int’l Symp. on Multi-Valued Logic, pp. 220–225 (2008), RevLib is available at http://www.revlib.org

  16. Xu, W., Zhu, Y.: A digital copyright protection scheme for soft-IP core based on FSMs. In: International Conference on Consumer Electronics, Communications and Networks (CECNet), pp. 3823–3826 (2011)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2013 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Roy, A., Mitra, D. (2013). Signature Embedding in the Functional Description of Reversible Circuit. In: Thampi, S.M., Atrey, P.K., Fan, CI., Perez, G.M. (eds) Security in Computing and Communications. SSCC 2013. Communications in Computer and Information Science, vol 377. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-40576-1_2

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-40576-1_2

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-40575-4

  • Online ISBN: 978-3-642-40576-1

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics