Abstract
This paper presents an FPGA hardware implementation of a special case of the fuzzy rule-based system, called P1-TS. The novelty of this work is recursive hardware architecture. The recursive implementation of the rule-based system allows us to build a versatile digital circuit for which FPGA logic resources requirements are small and independent on the number of input variables. The number of inputs is only limited by the capacity of the memory that stores the consequents of the rules. In our implementation, increasing the number of variables by 1 approximately doubles calculation time of the hardware device. We use floating-point arithmetic which ensures a higher dynamic range and makes that there is no need to focus on normalizing variables values to fixed word length.
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References
Zavala, A.H., Nieto, O.C.: Fuzzy Hardware: A Retrospective and Analysis. IEEE Trans. Fuzzy Systems 20(4), 623–635 (2012)
Sulaiman, N., Obaid, Z.A., Marhaban, M.H., Hamidon, M.N.: FPGA-Based Fuzzy Logic: Design and Applications – a Review. Proc. Int. J. Eng. and Technol. (IACSIT) 1(5), 491–503 (2009)
Kluska, J.: Analytical Methods in Fuzzy Modeling and Control. STUDFUZZ, vol. 241. Springer, Heidelberg (2009) Kacprzyk, J. (ed.)
Piegat, A., Olchowy, M.: Does an Optimal Form of an Expert Fuzzy Model Exist? In: Rutkowski, L., Scherer, R., Tadeusiewicz, R., Zadeh, L.A., Zurada, J.M. (eds.) ICAISC 2010, Part I. LNCS (LNAI), vol. 6113, pp. 175–184. Springer, Heidelberg (2010)
Kosko, B.: Fuzzy Engineering. Prentice Hall (1997)
Güven, M.K., Passino, K.M.: Avoiding Exponential Parameter Growth in Fuzzy Systems. IEEE Trans. Fuzzy Systems 9(1), 194–199 (2001)
Gniewek, L., Kluska, J.: Family of fuzzy J-K flip-flops based on bounded product, bounded sum and complementation. IEEE Trans. Syst., Man, Cybern. B, Cybern. 28(6), 861–868 (1998)
Kluska, J., Hajduk, Z.: Digital implementation of fuzzy Petri net based on asynchronous fuzzy RS flip-flop. In: Rutkowski, L., Siekmann, J.H., Tadeusiewicz, R., Zadeh, L.A. (eds.) ICAISC 2004. LNCS (LNAI), vol. 3070, pp. 314–319. Springer, Heidelberg (2004)
Gniewek, L., Kluska, J.: Hardware implementation of fuzzy Petri net as a controller. IEEE Trans. Syst., Man, Cybern. B, Cybern. 34(3), 1315–1324 (2004)
McKenna, M., Wilamowski, B.M.: Implementing a Fuzzy System on a Field Programmable Gate Array. In: Int. Joint Conf. Neural Networks, IJCNN 2001, Washington, DC, July 15-19, pp. 189–194 (2001)
IEEE Standard Board and ANSI: IEEE Standard for Binary Floating-Point Arithmetic. IEEE Std 754-2008
Thakkar, A.J., Ejnioui, A.: Design and implementation of double precision floating point division and square root on FPGAs. In: IEEE Aerospace Conference Proceedings, March 5-11, p. 7 (2006)
Hajduk, Z.: A floating point unit for the hardware virtual machine. Measurement Automation and Monitoring (PAK) 57(1), 82–85 (2011) (in Polish)
Meyer-Baese, U.: Digital Signal Processing with Field Programmable Gate Arrays, 3rd edn. Springer, Heidelberg (2007)
Intel Corp.: Hexadecimal Object File Format Specification. Revision A (1988)
Hajduk, Z., Sadolewski, J., Trybus, B.: Multiple tasks in FPGA-based programmable controller. e-Informatica 5(1), 77–85 (2011)
Thomas, D.E., Moorby, P.R.: The Verilog Hardware Description Language, 5th edn. Kluwer Academic Publishers (2002)
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Kluska, J., Hajduk, Z. (2013). Hardware Implementation of P1-TS Fuzzy Rule-Based Systems on FPGA. In: Rutkowski, L., Korytkowski, M., Scherer, R., Tadeusiewicz, R., Zadeh, L.A., Zurada, J.M. (eds) Artificial Intelligence and Soft Computing. ICAISC 2013. Lecture Notes in Computer Science(), vol 7894. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-38658-9_26
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DOI: https://doi.org/10.1007/978-3-642-38658-9_26
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