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Hardware Technology and Programming Languages for Reconfigurable Devices

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Wireless Multimedia Sensor Networks on Reconfigurable Hardware

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Abstract

This chapter discusses the hardware technology and programming languages for reconfigurable devices. The first part of the chapter discusses the technology available and the advantages of field programmable gate arrays (FPGAs) for implementation in hardware constrained environments such as wireless multimedia sensor networks and describes the range of FPGA technology and internal architectures using examples from Xilinx and Altera FPGA families. The second part of the chapter presents an overview of hardware description languages for reconfigurable devices. Here, ranges of available languages from lower-level languages like VHDL and Verilog to higher-level C-based languages are discussed. The chapter also contains an introduction to the Handel-C programming language which will be used in the next chapter for the processor specification. The DK Design Suite methodology used by Celoxica is also discussed.

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  1. School of Engineering, Edith Cowan University, Joondalup, Western Australia, Australia

    Li-minn Ang & Kah Phooi Seng

  2. Dept. of Computer Science and Networked Systems, Sunway University, Selangor, Malaysia

    Lee Seng Yeong & Wai Chong Chia

  3. Intel Architecture Group, Intel Corporation, Penang, Malaysia

    Li Wern Chew

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Ang, Lm., Seng, K.P., Chew, L.W., Yeong, L.S., Chia, W.C. (2013). Hardware Technology and Programming Languages for Reconfigurable Devices. In: Wireless Multimedia Sensor Networks on Reconfigurable Hardware. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-38203-1_3

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