Skip to main content
SpringerLink
Log in

How Many Steiner Terminals Can You Connect in 20 Years?

  • Chapter
Facets of Combinatorial Optimization

Abstract

Steiner trees are constructed to connect a set of terminal nodes in a graph. This basic version of the Steiner tree problem is idealized, but it can effectively guide the search for successful approaches to many relevant variants, from both a theoretical and a computational point of view. This article illustrates the theoretical and algorithmic progress on Steiner tree type problems on two examples, the Steiner connectivity and the Steiner tree packing problem.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Achterberg, T., Raack, C.: The MCF-separator—detecting and exploiting multi-commodity flows in MIPs. Math. Program. Comput. 2, 125–165 (2010)

    Article  MathSciNet  MATH  Google Scholar 

  2. Boit, C.: Personal communication (2004)

    Google Scholar 

  3. Borndörfer, R., Karbstein, M.: A direct connection approach to integrated line planning and passenger routing. In: Delling, D., Liberti, L. (eds.) 12th Workshop on Algorithmic Approaches for Transportation Modelling, Optimization, and Systems. OpenAccess Series in Informatics (OASIcs), vol. 25, pp. 47–57. Schloss Dagstuhl–Leibniz-Zentrum für Informatik, Wadern (2012)

    Google Scholar 

  4. Borndörfer, R., Karbstein, M., Pfetsch, M.E.: The Steiner connectivity problem. Math. Program., Ser. A (2012). doi:10.1007/s10107-012-0564-5

    Google Scholar 

  5. Brady, M.L., Brown, D.J.: VLSI routing: four layers suffice. In: Preparata, F.P. (ed.) Advances in Computing Research: VLSI Theory, vol. 2, pp. 245–258. Jai Press, London (1984)

    Google Scholar 

  6. Burstein, M., Pelavin, R.: Hierarchical wire routing. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 2, 223–234 (1983)

    Article  Google Scholar 

  7. Chopra, S.: Comparison of formulations and a heuristic for packing Steiner trees in a graph. Ann. Oper. Res. 50, 143–171 (1994)

    Article  MathSciNet  MATH  Google Scholar 

  8. Chvátal, V.: A greedy heuristic for the set-covering problem. Math. Oper. Res. 4(3), 233–235 (1979)

    Article  MathSciNet  MATH  Google Scholar 

  9. Coohoon, J.P., Heck, P.L.: BEAVER: a computational-geometry-based tool for switchbox routing. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 7, 684–697 (1988)

    Article  Google Scholar 

  10. Feige, U.: A threshold of lnn for approximating set-cover. In: Proceedings of the 28th ACM Symposium on Theory of Computing, pp. 314–318 (1996)

    Google Scholar 

  11. Frank, A.: Connections in Combinatorial Optimization. Oxford University Press, Oxford (2011)

    MATH  Google Scholar 

  12. Fulkerson, D.R.: Blocking and anti-blocking pairs of polyhedra. Math. Program. 1, 168–194 (1971)

    Article  MathSciNet  MATH  Google Scholar 

  13. Grötschel, M., Jünger, M., Reinelt, G.: Via minimization with pin preassignments and layer preference. Z. Angew. Math. Mech. 69(11), 393–399 (1989)

    Article  MathSciNet  MATH  Google Scholar 

  14. Grötschel, M., Martin, A., Weismantel, R.: Optimum path packing on wheels: the consecutive case. Comput. Math. Appl. 31, 23–35 (1996)

    Article  MATH  Google Scholar 

  15. Grötschel, M., Martin, A., Weismantel, R.: Packing Steiner trees: a cutting plane algorithm and computational results. Math. Program. 72, 125–145 (1996)

    Article  MATH  Google Scholar 

  16. Grötschel, M., Martin, A., Weismantel, R.: Packing Steiner trees: further facets. Eur. J. Comb. 17, 39–52 (1996)

    Article  MATH  Google Scholar 

  17. Grötschel, M., Martin, A., Weismantel, R.: Packing Steiner trees: polyhedral investigations. Math. Program. 72, 101–123 (1996)

    Article  MATH  Google Scholar 

  18. Grötschel, M., Martin, A., Weismantel, R.: Packing Steiner trees: separation algorithms. SIAM J. Discrete Math. 9, 233–257 (1996)

    Article  MathSciNet  MATH  Google Scholar 

  19. Grötschel, M., Martin, A., Weismantel, R.: The Steiner tree packing problem in VLSI design. Math. Program. 78(2), 265–281 (1997)

    Article  MATH  Google Scholar 

  20. Held, S., Korte, B., Rautenbach, D., Vygen, J.: Combinatorial optimization in VLSI design. In: Chvátal, V. (ed.) Combinatorial Optimization—Methods and Applications. NATO Science for Peace and Security Series—D: Information and Communication Security, vol. 31, pp. 33–96 (2011)

    Google Scholar 

  21. Hoàng, N.D., Koch, T.: Steiner tree packing revisited. Math. Methods Oper. Res. 76(1), 95–123 (2012)

    Article  MathSciNet  MATH  Google Scholar 

  22. Jørgensen, D.G., Meyling, M.: Application of column generation techniques in VLSI design. Master’s thesis, Department of Computer Science, University of Copenhagen (2000)

    Google Scholar 

  23. Karbstein, M.: Line planning and connectivity. Ph.D. thesis, TU Berlin (2013)

    Google Scholar 

  24. Koch, T.:. ZIMPL. zimpl.zib.de

  25. Koch, T.: Rapid mathematical programming. Ph.D. thesis, Technische Universität Berlin (2004)

    Google Scholar 

  26. Korte, B., Prömel, H.J., Steger, A.: Steiner trees in VLSI-layout. In: Korte, B., Lovász, L., Prömel, H.J., Schrijver, A. (eds.) Paths, Flows, and VLSI-Layout. Springer, Berlin (1990)

    Google Scholar 

  27. Lengauer, T.: Combinatorial Algorithms for Integrated Circuit Layout. Wiley, New York (1990)

    MATH  Google Scholar 

  28. Lipski, W.: On the structure of three-layer wireable layouts. In: Preparata, F.P. (ed.) Advances in Computing Research: VLSI Theory, vol. 2, pp. 231–244. Jai Press, London (1984)

    Google Scholar 

  29. Luk, W.K.: A greedy switch-box router. Integration 3, 129–149 (1985)

    Google Scholar 

  30. Martin, A.: Packen von Steinerbäumen: Polyedrische Studien und Anwendungen. Ph.D. thesis, Technische Universität Berlin (1992)

    Google Scholar 

  31. Oxley, J.G.: Matroid Theory. Oxford University Press, Oxford (1992)

    MATH  Google Scholar 

  32. Polzin, T.: Algorithms for the Steiner problem in networks. Ph.D. thesis, Universität des Saarlandes (2003)

    Google Scholar 

  33. Prömel, H., Steger, A.: The Steiner Tree Problem. Vieweg, Wiesbaden (2002)

    Book  MATH  Google Scholar 

  34. Raack, C., Koster, A.M.C.A., Orlowski, S., Wessäly, R.: On cut-based inequalities for capacitated network design polyhedra. Networks 57(2), 141–156 (2011)

    MathSciNet  MATH  Google Scholar 

  35. Raghavan, S., Magnanti, T.: Network connectivity. In: Dell’Amico, M., Maffioli, F., Martello, S. (eds.) Annotated Bibliographies in Combinatorial Optimization, pp. 335–354. Wiley, Chichester (1997)

    Google Scholar 

  36. Robacker, J.T.: Min-Max theorems on shortest chains and disjunct cuts of a network. Research Memorandum RM-1660, The RAND Corporation, Santa Monica, CA (1956)

    Google Scholar 

  37. Wolsey, L.A.: An analysis of the greedy algorithm for the submodular set covering problem. Combinatorica 2(4), 385–393 (1982)

    Article  MathSciNet  MATH  Google Scholar 

  38. Wong, R.T.: A dual ascent approach for Steiner tree problems on a directed graph. Math. Program. 28, 271–287 (1984)

    Article  MATH  Google Scholar 

Download references

Acknowledgements

We thank an anonymous referee and the editors for helpful comments and suggestions that improved the presentation of this paper. The work of Marika Karbstein was supported by the DFG Research Center Matheon “Mathematics for key technologies”.

Author information

Authors and Affiliations

  1. Konrad-Zuse-Zentrum für Informationstechnik Berlin, Takustr. 7, 14195, Berlin, Germany

    Ralf Borndörfer, Marika Karbstein & Thorsten Koch

  2. Faculty of Mathematics, Mechanics, and Informatics, Vietnam National University, 334 Nguyen Trai, Hanoi, Vietnam

    Nam-Dũng Hoang

  3. Department Mathematik, Friedrich-Alexander-Universität Erlangen-Nürnberg, Cauerstr. 11, 91058, Erlangen, Germany

    Alexander Martin

Authors
  1. Ralf Borndörfer
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Nam-Dũng Hoang
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Marika Karbstein
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Thorsten Koch
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Alexander Martin
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Ralf Borndörfer .

Editor information

Editors and Affiliations

  1. Dept. of Computer Science, University of Cologne, Pohligstr. 1, Cologne, 50969, Germany

    Michael Jünger

  2. Dept. of Computer Science, University of Heidelberg, Im Neuenheimer Feld 326, Heidelberg, 69120, Germany

    Gerhard Reinelt

Rights and permissions

Reprints and permissions

Copyright information

© 2013 Springer-Verlag Berlin Heidelberg

About this chapter

Cite this chapter

Borndörfer, R., Hoang, ND., Karbstein, M., Koch, T., Martin, A. (2013). How Many Steiner Terminals Can You Connect in 20 Years?. In: Jünger, M., Reinelt, G. (eds) Facets of Combinatorial Optimization. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-38189-8_10

Download citation

Publish with us

Policies and ethics

Search

Navigation