FlashbackSTM: Improving STM Performance by Remembering the Past

  • Hugo Rito
  • João Cachopo
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7760)


As multicore machines become pervasive, an ever growing number of programmers face the challenge of building highly parallel applications that take full advantage of modern parallel hardware architectures. Software Transactional Memory (STM) [3] is one promising abstraction to simplify this task because when using an STM programmers may ignore low-level synchronization details and simply specify which operations must execute atomically inside transactions. It is then the STM’s responsibility to preserve the program’s semantics, while maintaining as much parallelism and concurrency as possible.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Hugo Rito
    • 1
  • João Cachopo
    • 1
  1. 1.ESW/INESC-ID Lisboa/Instituto Superior TécnicoPortugal

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