Abstract
Based on current situation of the study in this area, our work will introduce a miniature CPT atomic clock system with small physical size, high stability and lower power consumption. The use of our original innovational technology to fabricate small cells can avoid the complexity and difficulty of the anodic bonding technology. By this technology, we could accomplish the objective to minimize the occupied volume of the physical part of the system to 1 cm3. The single FPGA chip is the main part of the control circuit to accomplish the slower start-up of the laser, two necessary locking loops to make the system work, and the temperature control logic. Our 3.035 GHz RF signal is generated from a TCXO via the technology of DDS. Our prototype is a significant progress to realize CSAC with the use of the single FPGA chip. We demonstrate our CPT clock prototype with the volume less than 100 cm3. This prototype has frequency instability of \( 1 \times 10^{ - 10} \) for 1 s and \( 3 \times 10^{ - 11} \) for 1000 s.
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Acknowledgments
The authors acknowledge the organizing committee of satellite navigation for giving us the opportunity to share our research, and we also gratefully acknowledge valuable advice and help from the students of Circuits and Systems Laboratory, Peking University. We hope that our country’s second generation of satellite navigation undertaking will be developed vigorously in the near future.
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Zhang, S., Wang, Z., Zhao, J. (2013). The Research of Miniaturization CPT Rb Atomic Clocks. In: Sun, J., Jiao, W., Wu, H., Shi, C. (eds) China Satellite Navigation Conference (CSNC) 2013 Proceedings. Lecture Notes in Electrical Engineering, vol 245. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-37407-4_31
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DOI: https://doi.org/10.1007/978-3-642-37407-4_31
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