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Fast Hardware Implementations of P Systems

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Membrane Computing (CMC 2012)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7762))

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Abstract

In this article we present the design of a fast hardware simulator for P systems using the field-programmable gate array (FPGA) technology. The simulator is non-deterministic and it uses a constant time procedure to choose one of the computational paths. The obtained strategy is fair and it is based on a pre-computation of all possible rule applications. This pre-computation is obtained by using the representation of all possible multisets of rules’ applications as context-free languages. Then using a standard technique involving formal power series it is possible to obtain the generating series of corresponding languages that permits to construct the structure representing all possible rule applications for any configuration. We give a hardware design implementing some concrete examples and present the obtained results which feature an important speed-up.

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Author information

Authors and Affiliations

  1. LACL, Département Informatique, Université Paris Est, 61, av. Général de Gaulle, 94010, Créteil, France

    Sergey Verlan

  2. ID2 Group, Department of Electronic Technology, University of Sevilla, Avda. Reina Mercedes s/n, 41012, Sevilla, Spain

    Juan Quiros

Authors
  1. Sergey Verlan
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  2. Juan Quiros
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Editor information

Editors and Affiliations

  1. Department of Algorithms and Their Applications, Eötvös Loránd University, , ,, Pázmány Péter sétány 1/c, 1117, Budapest, Hungary

    Erzsébet Csuhaj-Varjú

  2. Department of Computer Science, University of Sheffield, 211 Portobello Street, S1 4DP, Sheffield, UK

    Marian Gheorghe

  3. Leiden Center of Advanced Computer Science (LIACS), Leiden University, Niels Bohrweg 1, 2333, Leiden, CA, The Netherlands

    Grzegorz Rozenberg

  4. Turku Centre for Computer Science (TUCS), Leminkaisenkatu 14, 20520, Turku, Finland

    Arto Salomaa

  5. Department of Computer Science, University of Debrecen, Kassai út 26, 4028, Debrecen, Hungary

    György Vaszil

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Verlan, S., Quiros, J. (2013). Fast Hardware Implementations of P Systems. In: Csuhaj-Varjú, E., Gheorghe, M., Rozenberg, G., Salomaa, A., Vaszil, G. (eds) Membrane Computing. CMC 2012. Lecture Notes in Computer Science, vol 7762. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36751-9_27

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  • DOI: https://doi.org/10.1007/978-3-642-36751-9_27

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-36750-2

  • Online ISBN: 978-3-642-36751-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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