Abstract
A Two-Stage CMOS Op-Amp using P-Channel input differential stage suitable for portable device applications with ultra-low power, high swing, high gain is proposed. DC gain is increased by using Cascode Technique. A gain-stage implemented in Miller capacitor feedback path enhances the Unity-Gain Bandwidth. Topology selection, practical issues in designing micro-power Op-Amps and theoretical analysis of the design are discussed. The circuit is designed and simulated using TSMC 180nm technology. The circuit is simulated with 1.5V DC supply voltage. The proposed Op-amp provides 228MHz unity-gain bandwidth, 61.3 degree phase margin and a peak to peak output swing 1.15v. The circuit has 95.6dB gain. The maximum power dissipation of the designed Op-Amp is only 72μW. Suitable response in different temperature range is demonstrated by the designed system. Layouts of the proposed Op-Amp have been done in Cadence® Virtuoso Layout XL Design Environment.
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Singh, K., Mehta, V., Singh, M. (2013). Physical Design of Two Stage Ultra Low Power, High Gain Cmos OP-AMP for Portable Device Applications. In: Unnikrishnan, S., Surve, S., Bhoir, D. (eds) Advances in Computing, Communication, and Control. ICAC3 2013. Communications in Computer and Information Science, vol 361. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36321-4_68
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DOI: https://doi.org/10.1007/978-3-642-36321-4_68
Publisher Name: Springer, Berlin, Heidelberg
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