Abstract
The design process of embedded systems has changed in recent years. Because of increasing size of integrated circuits, increasing software complexity and decreasing time-to-market requirements and product costs, designing embedded systems becomes more and more complex. Such approaches combine modelling of software and ardware, and are called Co-Design approaches. Now-a–days systems are designed with some dedicated hardware unit and software unit on the same chip called SoC design and is the motivating factor for hardware/software co-design. Hardware/Software co-design improves the performance of the system.
Rijndael algorithm is a combination of encryption and decryption structure. In this paper decryption structure is designed and interfaced with NIOS II system. Using SOPC builder tool the NIOS II system is generated. Programming is done in C and NIOS II IDE is used to integrate the system. Decryption is also implemented separately as an accelerator and with different hardware/software partitions to improve the performance in terms of speed and area. By incorporating the co-design approach an optimized design for decryption is obtained.
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Ramteke, P.G., Hasamnis, M., Limaye, S.S. (2013). Co-design Approach for Implementation of Decryption Block of Rijndael’s Algorithm Using Soft Core Processor. In: Unnikrishnan, S., Surve, S., Bhoir, D. (eds) Advances in Computing, Communication, and Control. ICAC3 2013. Communications in Computer and Information Science, vol 361. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36321-4_67
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DOI: https://doi.org/10.1007/978-3-642-36321-4_67
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