Abstract
In this paper, we model conditional communication primitives of asynchronous circuits as three-valued logic operators and adopt the theory of observability don’t cares to create a theoretical framework that can be used to guide the optimization of conditional communication in asynchronous circuits. In particular, using this framework we demonstrate how operand-isolation cells introduced by standard synthesis algorithms can guide the addition of conditional communication primitives to surround blocks of asynchronous logic with conditional communication reducing switching activity and power. Our experimental results show for a 32-bit ALU, we achieve an average of 53% power reduction for about a 4% increase in area with no impact in performance.
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Saifhashemi, A., Beerel, P.A. (2013). Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines. In: Ayala, J.L., Shang, D., Yakovlev, A. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2012. Lecture Notes in Computer Science, vol 7606. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36157-9_21
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DOI: https://doi.org/10.1007/978-3-642-36157-9_21
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