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A Study of Cache Design in Stream Processor

  • Chiyuan Ma
  • Zhenyu Zhao
Conference paper
Part of the Communications in Computer and Information Science book series (CCIS, volume 337)

Abstract

Stream architecture is a newly developed high performance processor architecture oriented to multimedia processing. FT64 is 64-bit programmable stream processor and it aims at exploiting the parallelism and locality of the applications. In this paper, first, we inspect the memory access characteristics of FT64 with cache and without cache. Second, we propose an improved cache design method. Making use of the feature of stream data type used by FT64, the improved method avoids loading data from memory when the stream store instruction fully modifying cache block misses. The experiments show the performance has been improved by 20.7% and 25.8% when a normal cache and an improved cache are used respectively. Finally, we study on the performance influence of cache capacity and associativity. The results show that better performance can be achieved when we use a small cache and an associativity of 2 or 4.

Keywords

stream processor FT64 cache memory access fully modify 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Chiyuan Ma
    • 1
  • Zhenyu Zhao
    • 1
  1. 1.School of ComputerNational University of Defense TechnologyChangshaChina

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