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Hardware Architecture for the Parallel Generation of Long-Period Random Numbers Using MT Method

  • Shengfei Wu
  • Jiang Jiang
  • Yuzhuo Fu
Part of the Communications in Computer and Information Science book series (CCIS, volume 337)

Abstract

Random numbers are extremely important to the scientific and computational applications. Mersenne Twist(MT) is one of the most widely used high-quality pseudo-random number generators(PRNG) based on binary linear recurrences. In this paper, a hardware architecture for the generation of parallel long-period random numbers using MT19937 method was proposed. Our design is implemented on a Xilinx XC6VLX240T FPGA device and is capable of producing multiple samples each period. This performance let us obtain higher throughput than the non-parallelization architecture and software. The samples generated by our design are applied to a Monte Carlo simulation for estimating the value of π, and we achieve the accuracy of 99.99%.

Keywords

MT 19937 method Hardware architecture parallel generation FPGA 

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References

  1. 1.
    Konuma, S., Ichikawa, S.: Design and evaluation of hardware pseudo-random number generator MT19937. IEICE Trans. Info. Systems 88(12), 2876–2879 (2005)CrossRefGoogle Scholar
  2. 2.
    Dalal, I.L., Stefan, D.: A Hardware Framework for the Fast Generation of Multiple Long-period Random Number Streams. In: Proc. 16th ACM Int. Symp. FPGAs, pp. 245–254 (February 2008)Google Scholar
  3. 3.
    Matsumoto, M., Nishimura, T.: Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator. ACM Trans. Modeling and Computer Simulation 8(1), 3–30 (1998)zbMATHCrossRefGoogle Scholar
  4. 4.
    L’Ecuyer, P., Panneton, F.: Fast random number generators based on linear recurrences modulo 2: overview and comparison. In: Proc. 37th Conf. Winter Simulation, pp. 110–119 (December 2005)Google Scholar
  5. 5.
    Knuth, D.E.: The Art of Computer Programming, Seminumerical Algorithms, 3rd edn., vol. 2. Addison Wesley, Reading (1998)Google Scholar
  6. 6.
    Kurokawa, T., Kajisaki, H.: FPGA based implementation of Mersenne Twister. Sci. Eng. Rep. Nat. Def. Acad (Japan) 40(2), 15–21 (2003)Google Scholar
  7. 7.
    Pasciak, A.S., Ford, J.R.: A new high speed solution for the evaluation of monte carlo radiation transport computations. IEEE Trans. Nuclear Science 53(2), 491–499 (2006)CrossRefGoogle Scholar
  8. 8.
    Sriram, V., Kearney, D.: An area time efficient field programmable Mersenne Twister uniform random number generator. In: Proc. Int. Conf. Eng. of Reconfigurable Systems & Algorithms, pp. 244–246 (2006)Google Scholar
  9. 9.
    Yuan, L., et al.: Software/Hardware Framework for Generating Parallel Long-Period Random Numbers Using the WELL Method. In: Field Programmable Logic, pp. 110–115 (2011)Google Scholar
  10. 10.
    Wenqi, B., et al.: A reconfigurable macro-pipelined systolic accelerator architecture. In: 2011 International Conference on Field-Programmable Technology (FPT), pp. 1–6 (2011)Google Scholar
  11. 11.
    Jiang, J., Mirian, V.: Matrix Multiplication based on Scalable Macro-Pipelined FPGA Accelerator Architecture. In: International Conference on Reconfigurable Computing and FPGAs, ReConFig 2009, pp. 48–53 (2009)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Shengfei Wu
    • 1
  • Jiang Jiang
    • 1
  • Yuzhuo Fu
    • 1
  1. 1.School of MicroelectronicsShanghai Jiao Tong UniversityShanghaiP.R. China

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