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HCCM: A Hierarchical Cross-Connected Mesh for Network on Chip

  • Liguo Zhang
  • Huimin Du
  • Jianyuan Liu
Part of the Communications in Computer and Information Science book series (CCIS, volume 337)

Abstract

As the continuous development of semiconductor technology, more and more IP cores can be contained on the single chip. At this time the interconnected structure plays a decisive role on the area and performance of system on chip, and has a profound influence on the transmission capability of system. Based on the distributed routing lookup, we proposed a new kind of inerratic interconnection network is named HCCM (Hierarchical Cross-Connected Mesh), which is consisted of a N ×N Mesh interconnection of N 2 subnets, every subnet comprised of 2 ×2 interconnection by full connection. Meanwhile, this paper comes up with a new hierarchical routing algorithm——HXY (Hierarchical XY), the simulation results demonstrate the HCCM topology is superior to the Mesh and the Xmesh topology on the performance of system average communication delay and normalized throughput.

Keywords

Network on Chip (NoC) Distributed Routing Lookup Routing Algorithm OPNET Modeler 

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References

  1. 1.
    Zhu, X.J., Hu, W.W., Ma, K., Zhang, L.B.: Xmesh: A mesh-like topology for network on chip. Journal of Software 18(9), 2194–2204 (2007)CrossRefGoogle Scholar
  2. 2.
    Zhang, X.P., Liu, Z.-H., Zhao, Y.-J., Guan, H.-T.: Scalable Route- Journal of Software, 7 (July 2008)Google Scholar
  3. 3.
    Duato, J., Yalamanchili, S., Ni, L.M.: Interconnection networks: An engineering approach. Morgan Kaufmann (2003)Google Scholar
  4. 4.
    Asanovic, K.: The Landscape of Parallel Computing Research: A View from Berkeley, Electrical Engineering and Computer Sciences University of California at Berkeley, p. 10 (2006)Google Scholar
  5. 5.
    Dong, Z.P.: High-performance router. Posts & Telecom Press-Computer Science (2005)Google Scholar
  6. 6.
    Chang, Y.K., Liu, Y.C., Kuo, F.C.: A Pipelined IP Forwarding Engine With Fast Update, Bradford, United Kingdom, pp. 263–269 (2009)Google Scholar
  7. 7.
    Jiang, W., Prasanna, V.K.: Parallel IP lookup using multiple SRAM-based pipelined, pp. 14–18 (2008)Google Scholar
  8. 8.
    Sun, Z.G., Dai, Y., Gong, Z.H.: MPFS: A truly scalable router architecture for next generation Internet. Science in China Series F: Information Science 51, 1761–1771 (2008)CrossRefGoogle Scholar
  9. 9.
    Shen, Z.: Average diameter of network structures and its estimation. In: Proc. of the 1998 ACM Symp. on Applied Computing, pp. 593–597 (1998)Google Scholar
  10. 10.
    Dally, J., Towles, B.: Principles and Practices of Interconnection Network. Morgan Kaufman Publisher (2003)Google Scholar
  11. 11.
    Li, X., Ye, M.: Network Modeling and Simulation with OPNET Modeler. Xidian University, Xian (2006)Google Scholar
  12. 12.
    Wang, M., Du, H., Wang, Y.: An IPv4 Router based on Distributed Forwarding. In: The 3rd International Conference on Computer and Network Technology (ICCNT 2011), TaiYuan, pp. 10–15 (2011)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Liguo Zhang
    • 1
    • 2
  • Huimin Du
    • 2
  • Jianyuan Liu
    • 2
  1. 1.School of MicroelectronicsXi Dian UniversityXi’anChina
  2. 2.School of Electronic EngineeringXi’an University of Posts & TelecommunicationsChina

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