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The Schedulability of AES as a Countermeasure against Side Channel Attacks

  • Stephane Fernandes Medeiros
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7644)

Abstract

Side Channel Attacks are a major concern in modern security. Two main countermeasure techniques have been studied in order to counteract them: hiding and masking. Hiding techniques try to randomize the obtained traces by adding noise or by swapping instructions of the performed algorithm. In this work, we present a randomization of AES where AES operations can be executed even if previous operations, in the corresponding non-randomized execution of AES, are not finished. We present theoretical and practical results about the distribution of the execution times and show interesting results in comparison to existing techniques. An implementation is available on the author’s website.

Keywords

Side Channel Attacks Power Analysis Attacks hiding randomized execution AES 

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References

  1. 1.
    Ambrose, J., Ignjatovic, A., Parameswaran, S.: Power Analysis Side Channel Attacks. VDM Verlag (2010)Google Scholar
  2. 2.
    Benini, L., Macii, A., Macii, E., Omerbegovic, E., Pro, F., Poncino, M.: Energy-Aware Design Techniques for Differential Power Analysis Protection. In: DAC, pp. 36–41. ACM (2003)Google Scholar
  3. 3.
    Clavier, C., Coron, J.-S., Dabbous, N.: Differential Power Analysis in the Presence of Hardware Countermeasures. In: Koç, Ç.K., Paar, C. (eds.) CHES 2000. LNCS, vol. 1965, pp. 252–263. Springer, Heidelberg (2000)CrossRefGoogle Scholar
  4. 4.
    Daemen, J., Rijmen, V.: Resistance Against Implementation Attacks: A Comparative Study of the AES Proposals. In: Second Advanced Encryption Standard (AES) Candidate Conference (1999)Google Scholar
  5. 5.
    Daemen, J., Rijmen, V.: The Design of Rijndael: AES - The Advanced Encryption Standard. Springer (2002)Google Scholar
  6. 6.
    DES. Data Encryption Standard. In: FIPS PUB 46, Federal Information Processing Standards Publication, pp. 46–52 (1977)Google Scholar
  7. 7.
    Gandolfi, K., Mourtel, C., Olivier, F.: Electromagnetic analysis: Concrete results. In: Koç, Ç.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol. 2162, pp. 251–261. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  8. 8.
    Großschädl, J., Kizhvatov, I.: Performance and Security Aspects of Client-Side SSL/TLS Processing on Mobile Devices. In: Heng, S.-H., Wright, R.N., Goi, B.-M. (eds.) CANS 2010. LNCS, vol. 6467, pp. 44–61. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  9. 9.
    Irwin, J., Page, D., Smart, N.P.: Instruction Stream Mutation for Non-Deterministic Processors. In: Shulte, M., Bhattacharyya, S., Burgess, N., Schreiber, R. (eds.) 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pp. 286–295. IEEE Computer Society Press (July 2002)Google Scholar
  10. 10.
    Kocher, P.C.: Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems. In: Koblitz, N. (ed.) CRYPTO 1996. LNCS, vol. 1109, pp. 104–113. Springer, Heidelberg (1996)Google Scholar
  11. 11.
    Kocher, P.C., Jaffe, J., Jun, B.: Differential Power Analysis. In: Wiener, M.J. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 388–397. Springer, Heidelberg (1999)CrossRefGoogle Scholar
  12. 12.
    Mangard, S.: Hardware Countermeasures against DPA – A Statistical Analysis of Their Effectiveness. In: Okamoto, T. (ed.) CT-RSA 2004. LNCS, vol. 2964, pp. 222–235. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  13. 13.
    Mangard, S., Oswald, E., Popp, T.: Power Analysis Attacks: Revealing the Secrets of Smart Cards. Advances in Information Security. Springer-Verlag New York, Inc., Secaucus (2007)Google Scholar
  14. 14.
    May, D., Muller, H.L., Smart, N.P.: Non-deterministic Processors. In: Varadharajan, V., Mu, Y. (eds.) ACISP 2001. LNCS, vol. 2119, pp. 115–129. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  15. 15.
    Messerges, T.S., Dabbish, E.A., Sloan, R.H.: Investigations of Power Analysis Attacks on Smartcards. In: Proceedings of the USENIX Workshop on Smartcard Technology on USENIX Workshop on Smartcard Technology, pp. 151–162. USENIX Association, Berkeley (1999)Google Scholar
  16. 16.
    Örs, S.B., Gürkaynak, F.K., Oswald, E., Preneel, B.: Power-Analysis Attack on an ASIC AES implementation. In: ITCC (2), pp. 546–552. IEEE Computer Society (2004)Google Scholar
  17. 17.
    Örs, S.B., Oswald, E., Preneel, B.: Power-Analysis Attacks on an FPGA – First Experimental Results. In: Walter, C.D., Koç, Ç.K., Paar, C. (eds.) CHES 2003. LNCS, vol. 2779, pp. 35–50. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  18. 18.
    Standaert, F.-X., van Oldeneel tot Oldenzeel, L., Samyde, D., Quisquater, J.-J.: Power Analysis of FPGAs: How Practical is the Attack? In: Y. K. Cheung, P., Constantinides, G.A. (eds.) FPL 2003. LNCS, vol. 2778, pp. 701–711. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  19. 19.
    Tillich, S., Herbst, C., Mangard, S.: Protecting AES Software Implementations on 32-Bit Processors Against Power Analysis. In: Katz, J., Yung, M. (eds.) ACNS 2007. LNCS, vol. 4521, pp. 141–157. Springer, Heidelberg (2007)CrossRefGoogle Scholar

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© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Stephane Fernandes Medeiros
    • 1
  1. 1.Université libre de BruxellesBruxellesBelgium

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