Abstract
A Fetch&Inc object stores a non-negative integer and supports a single operation, fi, that returns the value of the object and increments it. Such objects are used in many asynchronous shared memory algorithms, such as renaming, mutual exclusion, and barrier synchronization. We present an efficient implementation of a wait-free Fetch&Inc object from registers and load-linked/store-conditional (ll/sc) objects. In a system with p processes, every fi operation finishes in O(log2 p) steps, and only a polynomial number of registers and O(logp)-bit ll/sc objects are needed. The maximum number of fi operations that can be supported is limited only by the maximum integer that can be stored in a shared register. This is the first wait-free implementation of a Fetch&Inc object that achieves both poly-logarithmic step complexity and polynomial space complexity, but does not require unrealistically large ll/sc objects or registers.
This research was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC) and by Grant CCF-0830737 of the US National Science Foundation (NSF).
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References
Afek, Y., Dauber, D., Touitou, D.: Wait-free made fast. In: Proc. of 27th ACM STOC, pp. 538–547 (1995)
Afek, Y., Weisberger, E., Weisman, H.: A completeness theorem for a class of synchronization objects. In: Proc. of 12th PODC, pp. 159–170 (1993)
Alistarh, D., Aspnes, J., Censor-Hillel, K., Gilbert, S., Zadimoghaddam, M.: Optimal-time adaptive strong renaming, with applications to counting. In: Proc. of 30th PODC, pp. 239–248 (2011)
Anderson, R.J., Woll, H.: Algorithms for the certified write-all problem. SIAM J. Comput. 26(5), 1277–1283 (1997)
Anderson, T.: The performance of spin lock alternatives for shared-money multiprocessors. IEEE Trans. Parallel Distrib. Syst. 1(1), 6–16 (1990)
Aspnes, J., Herlihy, M., Shavit, N.: Counting networks. J. of the ACM 41(5), 1020–1048 (1994)
Buss, J.F., Kanellakis, P.C., Ragde, P., Shvartsman, A.A.: Parallel algorithms with processor failures and delays. J. Algorithms 20(1), 45–86 (1996)
Clements, A.T., Kaashoek, M.F., Zeldovich, N.: Scalable address spaces using RCU balanced trees. In: 17th ASPLOS, pp. 199–210 (2012)
Cormen, T.H., Leiserson, C.E., Rivest, R.L., Stein, C.: Introduction to Algorithms. MIT Press (2001)
Freudenthal, E., Gottlieb, A.: Process coordination with fetch-and-increment. In: Proc. of ASPLOS-IV, pp. 260–268 (1991)
Goodman, J., Vernon, M., Woest, P.: Efficent synchronization primitives for large-scale cache-coherent multiprocessors. In: Proc. of ASPLOS-III, pp. 64–75 (1989)
Gottlieb, A., Lubachevsky, B., Rudolph, L.: Basic techniques for the efficient coordination of very large numbers of cooperating sequential processors. ACM Trans. Program. Lang. Syst. 5(2), 164–189 (1983)
Herlihy, M.: Wait-free synchronization. ACM Trans. Program. Lang. Syst. 13(1), 124–149 (1991)
Herlihy, M.: A methodology for implementing highly concurrent objects. ACM Trans. Program. Lang. Syst. 15(5), 745–770 (1993)
Herlihy, M., Shavit, N., Waarts, O.: Linearizable counting networks. Distr. Comp. 9(4), 193–203 (1996)
Jayanti, P.: A time complexity lower bound for randomized implementations of some shared objects. In: Proc. of 17th PODC, pp. 201–210 (1998)
Jayanti, P., Tan, K., Toueg, S.: Time and space lower bounds for nonblocking implementations. SIAM J. Comput. 30(2), 438–456 (2000)
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Ellen, F., Ramachandran, V., Woelfel, P. (2012). Efficient Fetch-and-Increment. In: Aguilera, M.K. (eds) Distributed Computing. DISC 2012. Lecture Notes in Computer Science, vol 7611. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33651-5_2
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DOI: https://doi.org/10.1007/978-3-642-33651-5_2
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