Abstract
High performance computing requires optimized interconnects in order to serve the increasing computing power from multi and many core CPUs. MPI is one of the most prominent programming models used for HPC systems. In order to achieve very low latency and high message rates, the functions of MPI must be implemented in a very efficient way. The specification of various MPI functions is analyzed and the impact to interconnect hardware is presented. A careful analysis of latency components and pipeline structure must be done in order to map the MPI functions to hardware in an efficient way.
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© 2012 Springer-Verlag Berlin Heidelberg
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Brüning, U. (2012). MPI Functions and Their Impact on Interconnect Hardware. In: Träff, J.L., Benkner, S., Dongarra, J.J. (eds) Recent Advances in the Message Passing Interface. EuroMPI 2012. Lecture Notes in Computer Science, vol 7490. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33518-1_2
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DOI: https://doi.org/10.1007/978-3-642-33518-1_2
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-33517-4
Online ISBN: 978-3-642-33518-1
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