Abstract
This paper presents the SEPELYNS architecture that permits to interconnect multiple spiking neurons focused on hardware implementations. SEPELYNS can connect millions of neurons with thousands of synapses per neuron in a layered fabric that provides some capabilities such as connectivity, expansion, flexibility, bio-plausibility and reusing of resources that allows simulation of very large networks. We present the three layers of this architecture (neuronal, network adapters and networks on chip layers) and explain its performance parameters such as throughput, latency and hardware resources. Some application examples of large neural networks on SEPELYNS are studied; these will show that use of on-chip parallel networks could permit the hardware simulation of populations of spiking neurons.
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Barrera, A.G., Arostegui, M.M. (2012). A Communication Infrastructure for Emulating Large-Scale Neural Networks Models. In: Villa, A.E.P., Duch, W., Érdi, P., Masulli, F., Palm, G. (eds) Artificial Neural Networks and Machine Learning – ICANN 2012. ICANN 2012. Lecture Notes in Computer Science, vol 7552. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33269-2_17
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DOI: https://doi.org/10.1007/978-3-642-33269-2_17
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-33268-5
Online ISBN: 978-3-642-33269-2
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