Abstract
This chapter covers the general description of the Router architecture, followed by the description of the template information necessary for routing, namely, the connectivity and routing constraints. Then the routing generation procedure is explained, depicting each task implemented in LAYGEN II’s optimization-based router, with emphasis on the evolutionary computational techniques used. Finally, the internal evaluation procedure used to verify if the routing solutions fulfill all the technology design rules and constraints is detailed.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
N. Lourenço, M. Vianello, J. Guilherme, N. Horta, LAYGEN—Automatic layout generation of analog ICs from hierarchical template descriptions, in Proceedings Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), pp. 213–216 (2006)
F. Maloberti, Analog Design for CMOS VLSI Systems (Kluwer Academic Publishers, Boston, 2001)
A.E. Eiben, J.E. Smith, Introduction to Evolutionary Computing (Springer, Berlin, 2003)
K. Deb, A. Pratap, S. Agarwal, T. Meyarivan, A fast and elitist multiobjective genetic algorithm: NSGA-II. IEEE Trans. Evol. Comput. 6(2), 182–197 (2002)
Mentor Graphics, http://www.mentor.com
A. Hastings, The Art of Analog Layout, 2nd edn. (Prentice Hall, New Jersey, 2005)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2013 The Author(s)
About this chapter
Cite this chapter
Martins, R.M.F., Lourenço, N.C.C., Horta, N.C.G. (2013). Router. In: Generating Analog IC Layouts with LAYGEN II. SpringerBriefs in Applied Sciences and Technology(). Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33146-6_5
Download citation
DOI: https://doi.org/10.1007/978-3-642-33146-6_5
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-33145-9
Online ISBN: 978-3-642-33146-6
eBook Packages: EngineeringEngineering (R0)