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A Dependency Aware Task Partitioning and Scheduling Algorithm for Hardware-Software Codesign on MPSoCs

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Algorithms and Architectures for Parallel Processing (ICA3PP 2012)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7439))

Abstract

Hardware-Software partitioning and scheduling are the crucial steps in HW-SW codesign of MPSoC since they have a strong effect on the performance, area, power and the system. Considered as NP-complete problem, the involvement of inter-task data dependencies have posed a serious challenge on the MPSoC based embedded application domain. In this paper, we propose an efficient algorithm for dependent task HW-SW codesign with Greedy Partitioning and Insert Scheduling Method (GPISM) by task graph. For hardware tasks, the critical path with maximum sum of benefit-to-area ratio can be achieved and implemented in hardware while the total area occupation in this path fitting global hardware constraint; after that, the task graph is updated by removing tasks in the critical path iteratively until the available hardware area doesn’t fit. For software tasks, the longest communication time path can be obtained from the updated task graph and assigned to software implementation integrally, then second path will be located if it does exist. For task scheduling, rest scatter nodes are inserted into hardware/software implementation list by scheduling criterion. Simulation results demonstrate that GPISM algorithm has a polynomial time complexity without affordable computation; meanwhile it can greatly improve system performance even in the case of generation large communication cost, and efficiently facilitate the researchers to partition and schedule embedded applications on MPSoC hardware architectures.

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© 2012 Springer-Verlag Berlin Heidelberg

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Li, C., Li, X., Wang, C., Zhou, X., Zeng, F. (2012). A Dependency Aware Task Partitioning and Scheduling Algorithm for Hardware-Software Codesign on MPSoCs. In: Xiang, Y., Stojmenovic, I., Apduhan, B.O., Wang, G., Nakano, K., Zomaya, A. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2012. Lecture Notes in Computer Science, vol 7439. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33078-0_24

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  • DOI: https://doi.org/10.1007/978-3-642-33078-0_24

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-33077-3

  • Online ISBN: 978-3-642-33078-0

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