Abstract
In the future it is very likely that asymmetric multi-core processors (AMP) will be used because of their proposed power efficiency and higher performance. In order to use the device intelligently and efficiently, it is essential to exploit the heterogeneity of AMPs. To fully exploit AMP systems, intelligent scheduling of tasks or intelligent resource management becomes one of the critical issues. In this paper, an AMP system is emulated, SPEC CPU2006 benchmark applications are executed as tasks, and heuristic methods for task scheduling are designed. Tasks are independent, non-preemptive, and have deadline (hard real-time) constraints. They arrive aperiodically and task migration is enabled. The performance metric is the total number of tasks completed by their deadline. The heuristic methods that are designed are compared with classic methods and the naïve Linux scheduler. Experimental results show that our task scheduling method completed 2.8 times more tasks than the naïve Linux scheduler for the proposed AMP environment.
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References
Kumar, R., Tullsen, D.M., Jouppi, N.P., Ranganathan, P.: Heterogeneous Chip Multiprocessors. IEEE Trans. on Computer 38(11), 32–38 (2005)
Hill, M.D., Marty, M.R.: Amdahl’s law in the multicore era. IEEE Trans. on Computer 41(7), 33–38 (2008)
Kumar, R., Tullsen, D.M., Ranganathan, P., Jouppi, N.P., Farkas, K.I.: Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. In: Proc. of the Annual International Symposium on Computer Architecture (2004)
Garey, M.R., Johnson, D.S.: Computers and Intractability: A Guide to the Theory of NP-Completeness, pp. 238–239. W.H. Freeman and Co. (1979)
Burd, T.D., Brodersen, R.W.: Energy efficient CMOS Microprocessor Design. In: Proc. of the Hawaii International Conference on System Sciences, vol. 1, pp. 288–297 (1995)
Shelepov, D., Fedorova, A., Blagodurov, S., Saez Alcaide, J.C., Perez, N., Kumar, V., Jeffery, S., Huang, Z.F.: HASS: A Scheduler for Heterogeneous Multicore Systems. Operating Systems Review 43(2), 66–75 (2009)
Saez, J.C., Prieto, M., Fedorova, A., Blagodourov, S.: A Comprehensive Scheduler for Asymmetric Multicore Systems. In: Proc. of ACM European Conference on Computer Systems (2010)
Winter, J.A., Albonesi, D.H., Shoemaker, C.A.: Scalable Thread Scheduling and Global Power Management for Heterogeneous Many-Core Architectures. In: Proc. of the 9th International Conference on Parallel Architectures and Compilation Techniques (2010)
Lakshminarayana, N.B., Lee, J., Kim, H.: Age Based Scheduling for Asymmetric Multiprocessors. In: Proc. of the Conference on High Performance Computing Networking, Storage and Analysis (2009)
Weiser, M., Welch, B., Demers, A., Shenker, S.: Scheduling for Reduced CPU Energy. In: Proc. Usenix Symp. Operating Systems Design and Implementation, pp. 13–23 (1994)
Koufaty, D., Reddy, D., Hahn, S.: Bias Scheduling in Heterogeneous Multi-core Architectures. In: Proc. of the ACM European Conference on Computer Systems (2010)
Eyerman, S., Eeckhout, L., Karkhanis, T., Smith, J.E.: A Top-Down Approach to Architecting CPI Component Performance Counters. IEEE Micro 28(3), 17–25 (2008)
Braun, T.D., Siegel, H.J., Beck, N., Boloni, L., Maheswaran, M., Reuther, A., Robertson, J., Theys, M., Yao, B., Hensgen, D., Freund, R.: A Comparison of Eleven Static Heuristics for Mapping a Class of Independent Tasks onto Heterogeneous Distributed Computing Systems. J. Parallel and Distributed Computing 61(6), 810–837 (2001)
Kim, J.-K., Siegel, H.J., Maciejewski, A.A., Eigenmann, R.: Dynamic Resource Management in Energy Constrained Heterogeneous Computing Systems Using Voltage Scaling. IEEE Trans. on Parallel and Distributed Systems, Special Issue on Power-Aware Parallel and Distributed Systems 19(11), 1445–1457 (2008)
Yu, Y., Prasanna, V.K.: Power-Aware Resource Allocation for Independent Tasks in Heterogeneous Real-Time Systems. In: IEEE 9th International Conference on Parallel Distributed Systems, pp. 341–348 (2002)
Calandrino, J.M., Baumberger, D., Li, T., Hahn, S., Anderson, J.H.: Soft Real-time Scheduling on Performance Asymmetric Multicore Platforms. In: Proc. of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium (2007)
Hung, C.-M., Chen, J.-J., Kuo, T.-W.: Energy-Efficient Real-Time Task Scheduling for a DVS System with a Non-DVS Processing Element. In: Proc. of the IEEE Real-Time Systems Symposium (2006)
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Kim, S.I., Kim, JK., Ha, H.U., Kim, T.H., Choi, K.H. (2012). Efficient Task Scheduling for Hard Real-Time Tasks in Asymmetric Multicore Processors. In: Xiang, Y., Stojmenovic, I., Apduhan, B.O., Wang, G., Nakano, K., Zomaya, A. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2012. Lecture Notes in Computer Science, vol 7440. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33065-0_20
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DOI: https://doi.org/10.1007/978-3-642-33065-0_20
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