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A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process

  • Brendan Mullane
  • Vincent O’Brien
Conference paper
  • 1.2k Downloads
Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 379)

Abstract

Direct Digital Synthesis (DDS) systems generate fine frequency resolution signals over a broad spectrum that are used in a wide variety of applications such as multi-mode RF, communications, measurements and test. A high performance DDS band-pass Digital to Analog Converter (DAC) architecture and implementation is presented that delivers high spectral purity over a narrow-band response. The low power D/A Converter is portable to standard CMOS processes and designed to achieve over 100dB narrow-band SFDR performance using Sigma-Delta (∑ Δ) modulation and multi-bit current steering techniques. A 3rd order digital ∑ Δ modulator is combined with a 4th order digital Dynamic Element Matching (DEM) block to shape the noise while calibrating for process mismatch variations. A low silicon area output stage is used to deliver a high performance specification.

Keywords

DDS Digital to Analog Converter Band-Pass DAC Static Mismatch Noise-shaping DEM 

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Copyright information

© IFIP International Federation for Information Processing 2012

Authors and Affiliations

  • Brendan Mullane
    • 1
  • Vincent O’Brien
    • 1
  1. 1.Microelectronics Competence Centre Ireland (MCCI), Department of Electronic and Computer EngineeringUniversity of LimerickLimerickIreland

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