A Low-Power Ultra-Fast Capacitor-Less LDO with Advanced Dynamic Push-Pull Techniques

  • Xin Ming
  • Ze-kun Zhou
  • Bo Zhang
Conference paper
Part of the IFIP Advances in Information and Communication Technology book series (IFIPAICT, volume 379)


A current-efficient, capacitor-less low-dropout regulator (LDO) with fast-transient response for portable applications is presented in this chapter. It makes use of an adaptive biasing common-gate amplifier to extend loop bandwidth of the LDO at heavy loads greatly. Also, the dynamic push-pull (DPP) slew-rate enhancement (SRE) circuit based on capacitive coupling detects rapid voltage spikes at the output to provide an extra current to charge and discharge the large gate capacitance of the power transistor momentarily. The proposed circuit has been implemented in a 0.35μm standard CMOS process. Experimental results show that it can deliver 100mA load current at 150mV dropout voltage. It only consumes 10μA quiescent current at no-load condition and is able to recover within 0.8μs even under the maximum load current change.


adaptive biasing dynamic push-pull technique capacitive coupling slew-rate enhancement high bandwidth low-dropout regulator system-on-chips 


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Copyright information

© IFIP International Federation for Information Processing 2012

Authors and Affiliations

  • Xin Ming
    • 1
  • Ze-kun Zhou
    • 1
  • Bo Zhang
    • 1
  1. 1.State Key Laboratory of Electronic Thin Films and Integrated DevicesUniversity of Electronic Science and Technology of ChinaChengduChina

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