Skip to main content

Time in Hardware Modeling and Design

  • Chapter
  • First Online:
Book cover Modeling Time in Computing

Abstract

In this chapter, we present the fundamental abstractions used to model digital circuits, from the level of networks of transistors, to logic gates, sequential machines, up to synchronous state machines and dataflow modular abstractions. The presentation devotes particular attention to how the representation of time changes with the increased abstraction of the various models, along the dimensions introduced in Chap. 3. For example, we discuss how the time domain shifts from continuous to discrete, the coordination of signals increases the level of synchrony, and the representation of time, initially explicit, becomes implicit.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 54.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Notes

  1. 1.

    Under the assumption that the forbidden input \(S = R = 0\) never occurs.

References

  1. Abarbanel-Vinov, Y., Aizenbud-Reshef, N., Beer, I., Eisner, C., Geist, D., Heyman, T., Reuveni, I., Rippel, E., Shitsevalov, I., Wolfsthal, Y., Yatzkar-Haham, T.: On the effective deployment of functional formal verification. Form. Method Syst. Des. 19, 35–44 (2001)

    Google Scholar 

  2. Agarwal, A., Lang, J.: Foundations of Analog and Digital Electronic Circuits. Morgan Kaufmann, Amsterdam (2005)

    Google Scholar 

  3. Baylis, J.: Error Correcting Codes: A Mathematical Introduction. Chapman and Hall, London/New York (1997)

    Google Scholar 

  4. Booth, T.L.: Sequential Machines and Automata Theory. Wiley, New York (1967)

    Google Scholar 

  5. DeMassa, T.A., Ciccone, Z.: Digital Integrated Circuits. Wiley (2008)

    Google Scholar 

  6. Fix, L.: Fifteen years of formal property verification in Intel. In: Grumberg, O., Veith, H. (eds.) 25 Years of Model Checking-History, Achievements, Perspectives. Lecture Notes in Computer Science, vol. 5000, pp. 139–144. Springer, Berlin (2008)

    Google Scholar 

  7. Gill, A.: Introduction to the Theory of Finite-State Machines. McGraw-Hill, New York (1962)

    Google Scholar 

  8. Ginsburg, S.: Introduction to Mathematical Machine Theory. Addison-Wesley, Reading (1982)

    Google Scholar 

  9. Grumberg, O., Veith, H. (eds.): 25 Years of Model Checking—History, Achievements, Perspectives. Lecture Notes in Computer Science, vol. 5000. Springer, Berlin (2008)

    Google Scholar 

  10. Heuring, V.P., Jordan, H.F.: Computer Systems Design and Architecture, 2nd edn. Prentice Hall, Harlow (2003)

    Google Scholar 

  11. Hickman, I.: Analog Electronics, 2nd edn. Newnes, Oxford/Boston (1999)

    Google Scholar 

  12. Hodges, D., Jackson, H., Saleh, R.: Analysis and Design of Digital Integrated Circuits. McGraw-Hill, Boston (2003)

    Google Scholar 

  13. Hopcroft, J.E., Motwani, R., Ullman, J.D.: Introduction to Automata Theory, Languages, and Computation, 3rd edn. Addison-Wesley, Boston (2006)

    Google Scholar 

  14. Jansen, D.: The Electronic Design Automation Handbook. Springer, Dordrecht (2003)

    Google Scholar 

  15. Jansen, D.: Electronic Design Automation for Integrated Circuits Handbook. CRC, Boca Raton (2006)

    Google Scholar 

  16. Kam, T., Villa, T., Brayton, R.K., Sangiovanni-Vincentelli, A.L.: Synthesis of Finite State Machines: Logic Optimization. Springer, Boston (1997)

    Google Scholar 

  17. Kam, T., Villa, T., Brayton, R.K., Sangiovanni-Vincentelli, A.L.: Synthesis of Finite State Machines: Functional Optimization. Springer, Boston (1997)

    Google Scholar 

  18. Katz, R.H., Borriello, G.: Contemporary Logic Design, 2nd edn. Prentice Hall, Upper Saddle River (2004)

    Google Scholar 

  19. Kohavi, Z.: Switching and Finite Automata Theory, 2nd edn. McGraw-Hill, New York (1978)

    Google Scholar 

  20. Kurshan, R.P.: Verification technology transfer. In: Grumberg, O., Veith, H. (eds.) 25 Years of Model Checking-History, Achievements, Perspectives. Lecture Notes in Computer Science, vol. 5000, pp. 46–64. Springer, Berlin (2008)

    Google Scholar 

  21. MacWilliams, F.J., Sloane, N.J.A.: The Theory of Error-Correcting Codes. North Holland, Amsterdam (1998)

    Google Scholar 

  22. Mandrioli, D., Ghezzi, C.: Theoretical Foundations of Computer Sciences. Wiley, New York (1987)

    Google Scholar 

  23. Martin, K.: Digital Integrated Circuit Design. Oxford University Press, New York (1999)

    Google Scholar 

  24. Mealy, G.H.: A method for synthesizing sequential circuits. Bell Syst. Tech. J. 34, 1045–1079 (1955)

    Google Scholar 

  25. Minsky, M.L.: Computation: Finite and Infinite Machines. Prentice Hall, Englewood Cliffs (1967)

    Google Scholar 

  26. Moore, E.F.: Gedanken-experiments on sequential machines. In: Automata Studies. Annals of Mathematical Studies, vol. 34, pp. 129–153. Princeton University Press, Princeton (1956)

    Google Scholar 

  27. Nagel, L.W.: Spice2: a computer program to simulate semiconductor circuits. Ph.D. thesis, EECS Department, University of California, Berkeley (1975)

    Google Scholar 

  28. Nagel, L.W., Pederson, D.: SPICE (simulation program with integrated circuit emphasis). Tech. Rep. UCB/ERL M382, EECS Department, University of California, Berkeley (1973)

    Google Scholar 

  29. von Neumann, J.: Probabilistic logics and the synthesis of reliable organisms from unreliable components. In: Automata Studies, pp. 329–378. Princeton University Press, Princeton (1956)

    Google Scholar 

  30. Patterson, D.A., Hennessy, J.L.: Computer Organization and Design, 4th edn. Morgan Kaufmann, Burlington (2008)

    Google Scholar 

  31. Quarles, T.L.: Analysis of performance and convergence issues for circuit simulation. Ph.D. thesis, EECS Department, University of California, Berkeley (1989)

    Google Scholar 

  32. Rabaey, J.M., Chandrakasan, A., Nikolic, B.: Digital Integrated Circuits, 2nd edn. Prentice Hall, Upper Saddle River (2003)

    Google Scholar 

  33. Rubin, S.M.: Computer Aids for VLSI Design. Addison-Wesley, Reading (1987). Available online at http://www.rulabinsky.com/cavd/

  34. Sipser, M.: Introduction to the Theory of Computation, 2nd edn. Course Technology, Boston (2005)

    Google Scholar 

  35. SPICE: Simulation program with integrated circuit emphasis. http://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE/

  36. Stroustrup, B.: The C++ Programming Language, 3rd edn. Addison-Wesley, Boston (2000)

    Google Scholar 

  37. The open SystemC initiative. http://www.systemc.org

  38. Tanenbaum, A.S.: Structured Computer Organization, 5th edn. Prentice Hall, Upper Saddle River (2005)

    Google Scholar 

  39. Thomas, D.E., Moorby, P.R.: The Verilog Hardware Description Language, 5th edn. Springer, New York (2002)

    Google Scholar 

  40. Tocci, R.J., Widmer, N., Moss, G.: Digital Systems: Principles and Applications, 11th edn. Prentice Hall, Harlow (2010)

    Google Scholar 

  41. Vardi, M.Y.: From church and prior to PSL. In: Grumberg, O., Veith, H. (eds.) 25 Years of Model Checking-History, Achievements, Perspectives. Lecture Notes in Computer Science, vol. 5000, pp. 150–171. Springer, Berlin (2008)

    Google Scholar 

  42. Vardi, M.Y.: From philosophical to industrial logics. In: R. Ramanujam, S. Sarukkai (eds.) ICLA. Lecture Notes in Computer Science, vol. 5378, pp. 89–115. Springer, Berlin (2009)

    Google Scholar 

  43. IEEE P1076—VHDL analysis and standardization group. http://www.eda.org/twiki/bin/view.cgi/P1076/

  44. Weste, N., Harris, D.: CMOS VLSI Design: A Circuits and Systems Perspective, 4th edn. Addison-Wesley, Boston (2010)

    Google Scholar 

  45. Wirth, N.: Digital Circuit Design for Computer Science Students: An Introductory Textbook. Springer, Berlin (1995)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2012 Springer-Verlag Berlin Heidelberg

About this chapter

Cite this chapter

Furia, C.A., Mandrioli, D., Morzenti, A., Rossi, M. (2012). Time in Hardware Modeling and Design. In: Modeling Time in Computing. Monographs in Theoretical Computer Science. An EATCS Series. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-32332-4_5

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-32332-4_5

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-32331-7

  • Online ISBN: 978-3-642-32332-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics