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Static Linearity

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High-Performance D/A-Converters

Part of the book series: Springer Series in Advanced Microelectronics ((MICROELECTR.,volume 36))

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Abstract

The static linearity of a D/A-converter is determined by the mismatch of the DAC-elements. “Matching” denotes the achievable degree of similarity of nominally identical devices and is ultimately limited by random fluctuations of process parameters during the fabrication of the integrated circuit. The resulting “random mismatch” solely depends on the specific process technology and is found to be inversely proportional to the device dimensions. In general, the statistical properties of the electrical parameters of closely spaced integrated circuit elements subject to random mismatch can be described by a normal distribution [39].

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Notes

  1. 1.

    Usually the matching constants are specified for transistor pairs. The single-device deviation from a (hypothetical) ideal device is then given by dividing the “pairwise” matching constants by \(\sqrt{2}\).

  2. 2.

    This is equivalent to having \({2}^{{M}_{L}} - 1\) independent versions of the lower segments, such that no element thereof is used twice in any major-carry transition.

  3. 3.

    Only a code-by-code calibration of the overall converter characteristic is able to correct also the static error introduced by the finite output impedance of the current cells. This can, e.g., be achieved with the method described in Sect. 3.3.4.

  4. 4.

    An exception are perhaps \(\Sigma \Delta \)-DACs with low physical resolution. With a small number of DAC unit cells the converter can indeed be designed for an accuracy approaching 14 bits, while still maintaining a reasonable silicon area. Of course, perfect layout is mandatory to even approach such a high degree of intrinsic matching.

  5. 5.

    In an N-element unary array the number of possible combinations that represent a digital input code k is given by the binomial factor \({r}_{k} = \left ({ N \atop k} \right ) = \frac{\left (N\right )!} {k!\left (N-k\right )!}\textrm{ , with }k \in [0; N - 1]\).

  6. 6.

    After 1 ∕ f rep s, the index pointer reaches again its starting point. Therefore, f rep is the fundamental frequency of the CLA-cycle.

  7. 7.

    Each output branch of the current folder must carry the full-scale current plus some extra current to prevent the cascode transistors from turning off near full scale.

  8. 8.

    Hence the name dynamic current copying.

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    Martin Clara

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Clara, M. (2013). Static Linearity. In: High-Performance D/A-Converters. Springer Series in Advanced Microelectronics, vol 36. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31229-8_3

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