An Artificial Bee Colony Algorithm Approach for Routing in VLSI
This paper presents an approach that applies the Artificial Bee Colony algorithm to the Two-Terminals-Net-Routing(TTNR) problem in VLSI physical design and compares its performance with the maze algorithm variant known as the state-of-the-art global routing algorithm. An effectively encoding method is described in this paper to solve the TTNR problem. In order to improve the convergence speed of the algorithm, some guiding solutions are employed as the initial solutions. The experimental results demonstrate that Artificial Bee Colony algorithm can find the less cost routing paths for TTNR problems than the maze algorithm.
KeywordsArtificial Bee Colony Algorithm VLSI physical design Global Routing Two-Terminals-Net-Routing
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