A Closer Look at Security in Random Number Generators Design

  • Viktor Fischer
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7275)


The issue of random number generation is crucial for the implementation of cryptographic systems. Random numbers are often used in key generation processes, authentication protocols, zeroknowledge protocols, padding, in many digital signature and encryption schemes, and even in some side channel attack countermeasures. For these applications, security depends to a great extent on the quality of the source of randomness and on the way this source is exploited. The quality of the generated numbers is checked by statistical tests. In addition to the good statistical properties of the obtained numbers, the output of the generator used in cryptography must be unpredictable. Besides quality and unpredictability requirements, the generator must be robust against aging effects and intentional or unintentional environmental variations, such as temperature, power supply, electromagnetic emanations, etc. In this paper, we discuss practical aspects of a true random number generator design. Special attention is given to the analysis of security requirements and on the way how this requirements can be met in practice.


Random number generation cryptographic hardware data security statistical tests digital design 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Badrignans, B., Danger, J.L., Fischer, V., Gogniat, G., Torres, L.: Security Trends for FPGAs, 1st edn., ch. 5, pp. 101–135. Springer (2011)Google Scholar
  2. 2.
    Baudet, M., Lubicz, D., Micolod, J., Tassiaux, A.: On the security of oscillator-based random number generators. Journal of Cryptology 24, 1–28 (2010)Google Scholar
  3. 3.
    Bernard, F., Fischer, V., Valtchanov, B.: Mathematical Model of Physical RNGs Based on Coherent Sampling. Tatra Mt. Math. Publ. 45, 1–14 (2010)MathSciNetzbMATHGoogle Scholar
  4. 4.
    Bochard, N., Bernard, F., Fischer, V., Valtchanov, B.: True-Randomness and Pseudorandomness in Ring Oscillator-Based True Random Number Generators. International Journal of Reconfigurable Computing, Article ID 879281, 13 (2010)Google Scholar
  5. 5.
    Bochard, N., Fischer, V.: A set of evaluation boards aimed at TRNG design evaluation and testing. Tech. rep., Laboratoire Hubert Curien, Saint-Etienne, France (March 2012),
  6. 6.
    Bucci, M., Luzzi, R.: Design of Testable Random Bit Generators. In: Rao, J.R., Sunar, B. (eds.) CHES 2005. LNCS, vol. 3659, pp. 147–156. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  7. 7.
    Danger, J.L., Guilley, S., Hoogvorst, P.: High Speed True Random Number Generator based on Open Loop Structures in FPGAs. Elsevier Microelectronics Journal 40(11), 1650–1656 (2009)Google Scholar
  8. 8.
    Dichtl, M., Golić, J.D.: High-Speed True Random Number Generation with Logic Gates Only. In: Paillier, P., Verbauwhede, I. (eds.) CHES 2007. LNCS, vol. 4727, pp. 45–62. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  9. 9.
    Fips, P. 140-1: Security Requirements for Cryptographic Modules. National Institute of Standards and Technology 11 (1994)Google Scholar
  10. 10.
    Fischer, V., Drutarovsky, M.: True Random Number Generator Embedded in Reconfigurable Hardware. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 415–430. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  11. 11.
    Güneysu, T.: True Random Number Generation in Block Memories of Reconfigurable Devices. In: Proc. Int. Conf. on Field-Programmable Technology – FPT 2010, pp. 200–207. IEEE (2010)Google Scholar
  12. 12.
    Gyorfi, T., Cret, O., Suciu, A.: High Performance True Random Number Generator Based on FPGA Block RAMs. In: Proc. Int. Symposium on Parallel and Distributed Processing, pp. 1–8. IEEE (2009)Google Scholar
  13. 13.
    Hajimiri, A., Lee, T.: A general theory of phase noise in electrical oscillators. IEEE Journal of Solid-State Circuits 33(2), 179–194 (1998)CrossRefGoogle Scholar
  14. 14.
    Holleman, J., Otis, B., Bridges, S., Mitros, A., Diorio, C.: A 2.92 muW Hardware Random Number Generator. In: IEEE Proceedings of ESSCIRC (2006)Google Scholar
  15. 15.
    Killmann, W., Schindler, W.: AIS 31: Functionality classes and evaluation methodology for true (physical) random number generators, version 3.1. Bundesamt fur Sicherheit in der Informationstechnik (BSI), Bonn (2001),
  16. 16.
    Killmann, W., Schindler, W.: A proposal for: Functionality classes for random number generators, version 2.0. Tech. rep., Bundesamt fur Sicherheit in der Informationstechnik (BSI), Bonn (September 2011),
  17. 17.
    Kohlbrenner, P., Gaj, K.: An Embedded True Random Number Generator for FPGAs. In: Proceedings of the 2004 ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, pp. 71–78 (2004)Google Scholar
  18. 18.
    Majzoobi, M., Koushanfar, F., Devadas, S.: FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control. In: Preneel, B., Takagi, T. (eds.) CHES 2011. LNCS, vol. 6917, pp. 17–32. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  19. 19.
    Marsaglia, G.: DIEHARD: Battery of Tests of Randomness (1996),
  20. 20.
    Rukhin, A., Soto, J., Nechvatal, J., Smid, J., Barker, E., Leigh, S., Levenson, M., Vangel, M., Banks, D., Heckert, A., Dray, J., Vo, S.: A statistical test suite for random and pseudorandom number generators for cryptographic applications, nist special publication 800-22 (2001),,
  21. 21.
    Santoro, R., Sentieys, O., Roy, S.: On-line monitoring of random number generators for embedded security. In: Proceedings of IEEE International Symposium on Circuits and Systems, ISCAS 2009 (2009)Google Scholar
  22. 22.
    Simka, M., Drutarovsky, M., Fischer, V., Fayolle, J.: Model of a True Random Number Generator Aimed at Cryptographic Applications. In: Proceedings of 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006, p. 4 (2006)Google Scholar
  23. 23.
    Sunar, B., Martin, W., Stinson, D.: A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks. IEEE Transactions on Computers, 109–119 (2007)Google Scholar
  24. 24.
    Tkacik, T.: A Hardware Random Number Generator. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 450–453. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  25. 25.
    Valtchanov, B., Aubert, A., Bernard, F., Fischer, V.: Characterization of randomness sources in ring oscillator-based true random number generators in FPGAs. In: 13th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, pp. 1–6 (2010)Google Scholar
  26. 26.
    Valtchanov, B., Fischer, V., Aubert, A.: Enhanced TRNG Based on the Coherent Sampling. In: 2009 International Conference on Signals, Circuits and Systems (2009)Google Scholar
  27. 27.
    Varchola, M., Drutarovsky, M.: Embedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generators. Radioengineering 18(4), 631–638 (2009)Google Scholar
  28. 28.
    Varchola, M., Drutarovsky, M.: New High Entropy Element for FPGA Based True Random Number Generators. In: Mangard, S., Standaert, F.-X. (eds.) CHES 2010. LNCS, vol. 6225, pp. 351–365. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  29. 29.
    Veljkovic, F., Rozic, V., Verbauwhede, I.: Low-Cost Implementations of On-the-Fly Tests for Random Number Generators. In: Design, Automation, and Test in Europe – DATE 2012. EDAA (2012)Google Scholar
  30. 30.
    Wold, K., Tan, C.H.: Analysis and Enhancement of Random Number Generator in FPGA Based on Oscillator Rings. In: 2008 International Conference on Reconfigurable Computing and FPGAs, pp. 385–390 (2008)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Viktor Fischer
    • 1
  1. 1.Laboratoire Hubert Curien UMR 5516 CNRSJean Monnet University, Member of University of LyonSaint-EtienneFrance

Personalised recommendations