Abstract
The non-reproducibility of the real signals makes on-site debugging more complex, and frequent on-site tests cost a lot, bringing a lot of trouble to the complete performance evaluation of the GPS receiver system. This thesis proposes a GPS IF data record and replay system based on FPGA and USB, describes the system design scheme, analyzes an optimizing design technique which guarantees the continuous, high-speed and stable record and replay of GPS data, and realizes a system in which IF data frequency point and data width can be flexibly adjusted. The tests show that the data record and replay format and results satisfy the design demands; the data format is of high flexibility, the high-speed data record and replay is continuous and stable which meets the performance evaluation demands of the receiver. The flexibility of data format and real-time replay not only enhance its practical value but also set the terms for the GPS and INS joint data record and replay system.
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Acknowledgments
This work has been partially supported by national 973 2009CB724002 project of China, national natural fund 41174028 project of China and special science funds of the State Key Laboratory of Information Engineering in Surveying, Mapping and Remote Sensing of China.
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Yan, K., Zheng, J., Zhang, T., Zhang, D., Liu, J. (2012). GPS IF Data Record and Replay System Based on FPGA. In: Sun, J., Liu, J., Yang, Y., Fan, S. (eds) China Satellite Navigation Conference (CSNC) 2012 Proceedings. Lecture Notes in Electrical Engineering, vol 161. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-29193-7_17
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DOI: https://doi.org/10.1007/978-3-642-29193-7_17
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