A Generalization of Spira’s Theorem and Circuits with Small Segregators or Separators

Abstract

Spira [28] showed that any Boolean formula of size s can be simulated in depth O(logs). We generalize Spira’s theorem and show that any Boolean circuit of size s with segregators of size f(s) can be simulated in depth O(f(s)logs). If the segregator size is at least s ^ε for some constant ε > 0, then we can obtain a simulation of depth O(f(s)). This improves and generalizes a simulation of polynomial-size Boolean circuits of constant treewidth k in depth O( k ² logn) by Jansen and Sarma [17]. Since the existence of small balanced separators in a directed acyclic graph implies that the graph also has small segregators, our results also apply to circuits with small separators. Our results imply that the class of languages computed by non-uniform families of polynomial-size circuits that have constant size segregators equals non-uniform NC ¹.

Considering space bounded Turing machines to generate the circuits, for f(s)log² s-space uniform families of Boolean circuits our small-depth simulations are also f(s)log² s-space uniform. As a corollary, we show that the Boolean Circuit Value problem for circuits with constant size segregators (or separators) is in deterministic SPACE (log² n). Our results also imply that the Planar Circuit Value problem, which is known to be P-Complete [16], can be solved in deterministic $SPACE (\sqrt{n} \log n)$.