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A 6-Bit, 12.5 GS/s Comparator for High-Speed A/D Conversion in 0.35 μm SiGe BiCMOS Technology

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Mechanical Engineering and Technology

Part of the book series: Advances in Intelligent and Soft Computing ((AINSC,volume 125))

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Abstract

This paper presents a monolithic comparator implemented in CHRT 0.35 μm SiGe BiCMOS technology for high-speed medium-resolution flash analog-to-digital conversion. The SiGe BiCMOS process provides HBT transistors with maximum fT as 55 GHz. The comparator occupies a die area of 240×65 μm2 with a power dissipation of 54.16 mW from a 3.3-V power supply. Operating with an input frequency of 1 GHz, the circuit can oversample up to 12.5 GS/s with 7 bits of resolution; while operating at Nyquist, the comparator can sample up to 12.5 GS/s with 6 bits resolution. This design achieves a considerable trade-off between power, speed and resolution.

* Sponsored by the Ph.D. Programs Foundation of Ministry of Education of China under 20090092110011.

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© 2012 Springer-Verlag GmbH Berlin Heidelberg

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Yin, K., Meng, Q., Liu, H., Tang, K. (2012). A 6-Bit, 12.5 GS/s Comparator for High-Speed A/D Conversion in 0.35 μm SiGe BiCMOS Technology. In: Zhang, T. (eds) Mechanical Engineering and Technology. Advances in Intelligent and Soft Computing, vol 125. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-27329-2_5

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  • DOI: https://doi.org/10.1007/978-3-642-27329-2_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-27328-5

  • Online ISBN: 978-3-642-27329-2

  • eBook Packages: EngineeringEngineering (R0)

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