Abstract
Solid State Drives organize NAND flash memory in m-way & n-channel structure in order to increase the read/write throughput and the capacity. In m-way & n-channel structure, the basic read/write unit is usually multiples of physical page size. However, the influence of the read/write unit size on the performance has not been sufficiently studied. In this work, we investigate the influence of the read/write unit size on the representative FTL schemes. The results through a trace-driven simulation show that the optimal point is in the middle of small unit and large unit. Too large read/write unit hurts the performance seriously because small sized write requests occupy a considerable portion in windows PC. Especially, the performance of the page mapping scheme steeply decreases by large clustered page when the utilization is high.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Ban, A.: Flash file system optimized for page-mode flash technologies. United States Patent, No. 5,937,425 (1999)
Ban, A.: Flash file system. United States Patent, No. 5,404,485 (1995)
Kim, J., Kim, J.M., Noh, S., Min, S., Cho, Y.: A space-efficient flash translation layer for compactflash systems. IEEE Transactions on Consumer Electronics 48, 366–375 (2002)
Lee, S., Park, D., Chung, T., Choi, W., Lee, D., Park, S., Song, H.: A log buffer based flash translation layer using fully associative sector translation. ACM Transactions on Embedded Computing Systems 6(3) (2007)
Shin, I.: Light weight sector mapping scheme for NAND-based block devices. IEEE Transactions on Consumer Electronics 56, 651–656 (2010)
Shin, I.: Reducing computational overhead of flash translation layer with hashed page tables. IEEE Transactions on Consumer Electronics 56, 2344–2349 (2010)
Kim, J., Jung, D., Kim, J., Huh, J.: A methodology for extracting performance parameters in Solid State Disks (SSDs). In: Proceedings of MASCOTS (2009)
HY27UF084G2M series 4Gbit (512Mx8bit) NAND flash, Hynix Corp. (2006)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2012 Springer-Verlag GmbH Berlin Heidelberg
About this chapter
Cite this chapter
Shin, I. (2012). Flash Translation Layer for Solid State Drives. In: Zhang, Y. (eds) Future Communication, Computing, Control and Management. Lecture Notes in Electrical Engineering, vol 142. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-27314-8_58
Download citation
DOI: https://doi.org/10.1007/978-3-642-27314-8_58
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-27313-1
Online ISBN: 978-3-642-27314-8
eBook Packages: EngineeringEngineering (R0)