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Design Methodology of Asynchronous Comparator/Mux

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Advances in Electrical Engineering and Electrical Machines

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 134))

Abstract

This paper discusses a new type of low-power asynchronous comparator-mux. The asynchronous design stabilizes the data input into the comparator and multiplexer to avoid glitches and transition data generated in the synchronous circuit due to the asynchronization between the comparator and multiplexer. It also leads to a decrease in power consumption. For a 16-bit comparator-mux, the asynchronous design uses just 40.6% of the power of the synchronous design. With the bit width increases, the power consumption of the asynchronous design is much lower than the corresponding synchronous design.

Grant from China National Natural Science Foundation fund: 60976031 grant from Basic Research Fund of South China University of Technology: 2009ZM0310 grant from fund of Science and Technology Department of Guangdong Province: 2009B080701060, 2010A080402015.

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Correspondence to Xiaobo Jiang .

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© 2011 Springer-Verlag Berlin Heidelberg

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Jiang, X., Ye, D. (2011). Design Methodology of Asynchronous Comparator/Mux. In: Zheng, D. (eds) Advances in Electrical Engineering and Electrical Machines. Lecture Notes in Electrical Engineering, vol 134. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-25905-0_42

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  • DOI: https://doi.org/10.1007/978-3-642-25905-0_42

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-25904-3

  • Online ISBN: 978-3-642-25905-0

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