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A Data Allocation Method in Multi-processors Task Scheduling Procedure

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Advances in Electrical Engineering and Electrical Machines

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 134))

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Abstract

Traditional task scheduling algorithms concentrate on the optimization of the speedup in parallel processing, where the data allocation procedure which maps the data operation of each task to the physical memory in processors is usually omitted. In this paper, the data allocation problem in task scheduling procedure is analyzed and explored. An allocating method is proposed, which consists of three steps. \(\textcircled1\) Establish the memory model for all the compute tasks and IPC tasks; \(\textcircled2\) Construct the set SE for the determination of the executing priority relations between tasks through the DFS(Deep First Search) method; \(\textcircled3\) Allocate data buffers of tasks with different executing priority to the same physical memory areas to achieve memory reusing. The experiment shows that by make use of the executing priority relations, different tasks could accessing the same physical memory areas through sharing-timing mode, which reduces the memory usage effectively.

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References

  1. Wang, C., Liu, W.: Multi-processor task scheduling in signal processing systems. In: Proceedings of the International Conference on Computer Science and Information Technology, Chengdu, China, pp. 532–539 (2011)

    Google Scholar 

  2. Sih, G.C., Lee, E.A.: Scheduling to account for interprocssor communication within interconnection-constrained processor networks. In: Proceedings of the International Conference on Parallel Processing, pp. 9–16 (1990)

    Google Scholar 

  3. Ebaid, A., Ammar, R., Rajasekaran, S.: Task clustering & scheduling with duplication using recursive critical path approach (RCPA). In: Proceedings of the 2010 IEEE International Symposium on Signal Processing and Information Technology, Luxor, pp. 34–41 (2010)

    Google Scholar 

  4. Hwang, R., Gen, M., Katayama, H.: A comparison of multiprocessors task scheduling algorithms with communication costs. Computer & Research 35, 976–993 (2008)

    Article  MathSciNet  MATH  Google Scholar 

  5. Salamy, H., Ramanujam, J.: A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip. In: Seznec, A., Emer, J., O’Boyle, M., Martonosi, M., Ungerer, T. (eds.) HiPEAC 2009. LNCS, vol. 5409, pp. 263–277. Springer, Heidelberg (2009)

    Chapter  Google Scholar 

  6. Suhendra, V., Raghavan, C., Mitra, T.: Integrated scratchpad memory optimization and task scheduling for MPSoc Architecture. In: Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, Seoul, Korea, pp. 23–25 (2006)

    Google Scholar 

  7. Dominiguez, A., Udayakumaran, S., Barua, R.: Heap data allocation to scrathc-pad memory in embedded systems. Journal of Embedded Computing (2006)

    Google Scholar 

  8. Ozturk, O., Kandemir, M., Kolcu, I.: Shared scratch-pad memory space management. In: Proceedings of the International Symposium on Quality of Electronic Design 2006, San Joes, CA (2006)

    Google Scholar 

  9. Fan, X.-K., Wang, Y.-L., Chen, H.: Real-Time Implementation of Airborne Radar Space-Time Adaptive Processing. Journal of Electronics & Information Technology 28(12), 2224–2227 (2006)

    Google Scholar 

  10. Ren, L., Wang, Y.-L., Chen, H., Chen, J.-W.: Research on the scheduling problems of STAP parallel processing system. Systems Engineering and Electronics 31(4), 874–880 (2009)

    Google Scholar 

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Wang, C., Liu, W., Yuan, Py. (2011). A Data Allocation Method in Multi-processors Task Scheduling Procedure. In: Zheng, D. (eds) Advances in Electrical Engineering and Electrical Machines. Lecture Notes in Electrical Engineering, vol 134. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-25905-0_32

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  • DOI: https://doi.org/10.1007/978-3-642-25905-0_32

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-25904-3

  • Online ISBN: 978-3-642-25905-0

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