Abstract
The development of intermediate frequency (IF) receiver for radar is from analog system to digital system. A modular field programmable gate array (FPGA)-based digital multi-beamforming IF receiver is given in this paper. A modular hardware description language (HDL) code is developed for Virtex-6 FPGA of digital IF receiver module, with multi-channels sampling at up to 400 MegaHerz (MHz). The system consists of quadrature demodulate module, fractional delay filters module and beamforming module. A brief description of these modules is presented, and the quantization error between the ideal floating-point data type and the fixed-point data type which is implemented in the FPGA is simulated. The result shows that the FPGA-based digital multi-beamforming IF receiver provides a high-performance method for radar application.
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© 2011 Springer-Verlag Berlin Heidelberg
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Li, H., Zhuang, S., He, Y., Zhu, X. (2011). Modular FPGA-Based Digital Multi-beamforming Intermediate Frequency Receiver for Radar. In: Zheng, D. (eds) Advances in Electrical Engineering and Electrical Machines. Lecture Notes in Electrical Engineering, vol 134. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-25905-0_3
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DOI: https://doi.org/10.1007/978-3-642-25905-0_3
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Online ISBN: 978-3-642-25905-0
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