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Parallelization of the Training for Face Detection with Transactional Memory

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Advances in Automation and Robotics, Vol. 2

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 123))

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Abstract

The development of multi-core processor makes the parallelization of traditional sequential algorithms increasingly important. Meanwhile, transactional memory serves a good parallel programming model. This paper takes the advantage of software transactional memory to parallelize the Multi-Exit Asymmetric Adaboost algorithm for face detection. The parallel version is evaluated on three different implementations of software transactional memory. The experiment results show that the transactional memory based parallelization outperforms the traditional lock based approach. A speedup of nearly seven is achieved on a eight-core machine on an eight-core system.

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Zeng, K. (2011). Parallelization of the Training for Face Detection with Transactional Memory. In: Lee, G. (eds) Advances in Automation and Robotics, Vol. 2. Lecture Notes in Electrical Engineering, vol 123. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-25646-2_26

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  • DOI: https://doi.org/10.1007/978-3-642-25646-2_26

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-25645-5

  • Online ISBN: 978-3-642-25646-2

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