A Minimal Average Accessing Time Scheduler for Multicore Processors

  • Thomas Canhao Xu
  • Pasi Liljeberg
  • Hannu Tenhunen
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7017)


In this paper, we study and analyze process scheduling for multicore processors. It is expected that hundreds of cores will be integrated on a single chip, known as a Chip Multiprocessor (CMP). However, operating system process scheduling, one of the most important design issue for CMP systems, has not been well addressed. We define a model for future CMPs, based on which a minimal average accessing time scheduling algorithm is proposed to reduce on-chip communication latencies and improve performance. The impact of memory access and inter process communication (IPC) in scheduling are analyzed. We explore six typical core allocation strategies. Results show that, a strategy with the minimal average accessing time of both core-core and core-memory outperforms other strategies, the overall performance for three applications (FFT, LU and H.264) has improved for 8.23%, 4.81% and 10.21% respectively comparing with other strategies.


Fast Fourier Transform Schedule Algorithm Allocation Strategy Multicore Processor Memory Controller 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Thomas Canhao Xu
    • 1
    • 2
  • Pasi Liljeberg
    • 1
    • 2
  • Hannu Tenhunen
    • 1
    • 2
  1. 1.Turku Center for Computer ScienceTurkuFinland
  2. 2.Department of Information TechnologyUniversity of TurkuTurkuFinland

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