Abstract
We present McAiT, a tool for estimating the Worst-Case Execution Times (WCET) of programs running on multicore processors. The highlight of McAiT is that it leverages timed automata to model both the timing behaviors of the programs’ interaction with its environment (based on the results of local cache analysis by abstract interpretation) and a broad range of on-chip shared resources, such as shared buses and shared caches. McAiT also allows for modeling complex task models, such as synchronization, jitter, etc. High analysis precision is achieved by the McAiT approach, which is demonstrated by extensive experiments. The tool also supports the classical Implicit Path Enumeration Technique (IPET) combined with worst-case shared resource access delay for WCET estimation, to provide the users with the flexibility to trade analysis precision for efficiency.
This work was sponsored by NSF of China (60973017), and the Fundamental Research Funds for the Central Universities of China (N100304001).
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Lv, M., Guan, N., Deng, Q., Yu, G., Yi, W. (2011). McAiT – A Timing Analyzer for Multicore Real-Time Software. In: Bultan, T., Hsiung, PA. (eds) Automated Technology for Verification and Analysis. ATVA 2011. Lecture Notes in Computer Science, vol 6996. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24372-1_29
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DOI: https://doi.org/10.1007/978-3-642-24372-1_29
Publisher Name: Springer, Berlin, Heidelberg
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